Comparison of linear and circular cell dual channel emitter switched thyristors

Abstract

The total on-state voltage drop in a Dual Channel Emitter Switched Thyristor (DC-EST) is a function of the MOS channel density and the thyristor area. In this paper, it is demonstrated that the total on-state voltage drop has a minimum value at an optimum floating N+ emitter size. The minimum in the total on-state voltage drop was experimentally verified for both linear and circular cell DC-ESTs in excellent agreement with analytical predictions. The optimum floating emitter size was found to depend on the lifetime and the operating temperature. The minimum value of the total on-state voltage drop for the linear DC-EST was found to be lower than that for the circular design. However, for the optimum floating emitter size, the circular design has a higher maximum controllable current density than the linear design.