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Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95最新文献

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The bidirectional power NMOS-a new concept in battery disconnect switching 双向电源nmos是电池断开开关中的一个新概念
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515085
R.K. Williams, R. Blattner, M. S. Shekar, A. Butani, M. Darwish
{"title":"The bidirectional power NMOS-a new concept in battery disconnect switching","authors":"R.K. Williams, R. Blattner, M. S. Shekar, A. Butani, M. Darwish","doi":"10.1109/ISPSD.1995.515085","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515085","url":null,"abstract":"A new bidirectionally blocking, bidirectionally conducting switch for computer battery power management using a unique symmetric power NMOS is described. Symmetric drift regions for off-state electric field relief, body doping profile optimization for low-body-effect low on-state losses, and a high parasitic bipolar sustaining voltage for controlled turn-on transients are detailed. An SO-16 battery disconnect switch (BDS) having a 60-m/spl Omega/ 4-A rating with an 18-V sustaining voltage and 35-V breakdown is shown to outperform comparable area back-to-back configured discrete DMOS AC switches.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122280447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
8 kV/3.6 kA light triggered thyristor 8kv /3.6 kA光触发晶闸管
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515030
T. Nakagawa, K. Satoh, M. Yamamoto, K. Hirasawa, K. Ohta
{"title":"8 kV/3.6 kA light triggered thyristor","authors":"T. Nakagawa, K. Satoh, M. Yamamoto, K. Hirasawa, K. Ohta","doi":"10.1109/ISPSD.1995.515030","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515030","url":null,"abstract":"We have developed a light triggered thyristor with the blocking voltage of 8 kV and the average current of 3.6 kA by using a 6 inch FZ Si wafer and adopting new design techniques. The new multidynamic gate structure achieved a high di/dt capability at the rating voltage. The new arrangement of pilot thyristors made the dv/dt capability high. Additionally, optimizing the new local lifetime control technology by proton irradiation improved the trade-off relationship between the on-state voltage and the reverse-recovered charge.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127468349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
A comparison of emitter concepts for high voltage IGBTs 高压igbt发射极概念之比较
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515040
F. Bauer, W. Fichtner, H. Dettmer, R. Bayerer, E. Herr, T. Stockmeier, U. Thiemann
{"title":"A comparison of emitter concepts for high voltage IGBTs","authors":"F. Bauer, W. Fichtner, H. Dettmer, R. Bayerer, E. Herr, T. Stockmeier, U. Thiemann","doi":"10.1109/ISPSD.1995.515040","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515040","url":null,"abstract":"The impact of the injection efficiency of unshorted anode p/sup +/emitters on the static and dynamic electrical characteristics of high voltage non-punchthrough IGBTs is analysed using mixed mode two-dimensional device and circuit simulation tools. The results are compared to IGBT device structures with shorted anodes. IGBTs with high and low efficiency anode emitters can be designed to have the same conduction losses despite major differences in the p/sup +/emitter doping profiles and the carrier lifetime. Turn-off losses are in general higher for IGBTs with homogeneous low efficiency emitters. Pushing the trade-off between conduction and turn-off losses to the level set by anode shorted IGBTs is also feasible for homogeneous, low efficiency p/sup +/emitter devices, though it requires approaching the technological limits of injection efficiency and carrier lifetime.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127524575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
The effect of electron irradiation and proton implantation on and a novel operation of IGBT integrated current sensors 电子辐照和质子注入对IGBT集成电流传感器的影响及一种新的工作方式
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515041
Z. Shen, V. Parthasarathy, T. P. Chow
{"title":"The effect of electron irradiation and proton implantation on and a novel operation of IGBT integrated current sensors","authors":"Z. Shen, V. Parthasarathy, T. P. Chow","doi":"10.1109/ISPSD.1995.515041","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515041","url":null,"abstract":"In this paper, the effect of electron irradiation and proton implantation on a punchthrough-type, n-channel, 600 V vertical IGBT and its integrated current sensors is studied. Also, we have applied internal voltage probing to examine the potential surrounding active and MOS integrated sensors.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126475242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 30 V high-speed thin-film SOI power MOSFET having tungsten polycide gate 一种30 V高速薄膜SOI功率MOSFET，具有钨多晶硅栅极
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515083
S. Matsumoto, Il–jung Kim, T. Sakai, T. Fukumitsu, T. Yachi
{"title":"A 30 V high-speed thin-film SOI power MOSFET having tungsten polycide gate","authors":"S. Matsumoto, Il–jung Kim, T. Sakai, T. Fukumitsu, T. Yachi","doi":"10.1109/ISPSD.1995.515083","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515083","url":null,"abstract":"A 30 V high-speed thin-film SOI power MOSFET with a tungsten polycide gate has been fabricated with a practical size. The gate resistance is about one third that of one with a conventional poly-Si gate. The experimental device had a breakdown voltage of 34 V and a specific on-resistance of 72 m/spl Omega//spl middot/mm/sup 2/.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121174491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
New power device figure of merit for high-frequency applications 高频应用的新型功率器件的优点图
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515055
Il–jung Kim, S. Matsumoto, T. Sakai, T. Yachi
{"title":"New power device figure of merit for high-frequency applications","authors":"Il–jung Kim, S. Matsumoto, T. Sakai, T. Yachi","doi":"10.1109/ISPSD.1995.515055","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515055","url":null,"abstract":"A new power device figure of merit is proposed for high-frequency applications. Based on a theoretical analysis, the impacts of circuit topologies and material properties are examined. This figure of merit is very useful in optimizing or choosing a power device operating in high-frequency circuits. A thin-film SOI power MOSFET is taken as an example, and the effect of its device parameters on the power loss is analyzed to provide a basic guideline for optimization.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123193377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 51
New MOS-gate controlled thyristor (MGCT) 新型mos门控晶闸管(MGCT)
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515021
J. Ajit, D. Kinzer
{"title":"New MOS-gate controlled thyristor (MGCT)","authors":"J. Ajit, D. Kinzer","doi":"10.1109/ISPSD.1995.515021","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515021","url":null,"abstract":"A new three-terminal power device structure called the MOS-Gate Controlled Thyristor (MGCT) is described. The device consists of a thyristor structure with the thyristor current constrained to flow via the channel region of an enhancement-mode MOSFET. This allows limiting of the thyristor current by the MOSFET. The new structure does not have any parasitic thyristor structure. Multi-cell MGCT devices fabricated along with IGBT devices on the same wafer showed about 20% improvement in on-state voltage drop over IGBT for 750 V devices.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124136031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A self-aligned latch-free IGBT with sidewall diffused n/sup +/ emitter 一种自对准无锁存IGBT，带有侧壁扩散的n/sup +/发射器
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515034
C. Yun, Doo-Young Kim, Byung-Hoon Lee, M. Han, Yearn-Ik Choi
{"title":"A self-aligned latch-free IGBT with sidewall diffused n/sup +/ emitter","authors":"C. Yun, Doo-Young Kim, Byung-Hoon Lee, M. Han, Yearn-Ik Choi","doi":"10.1109/ISPSD.1995.515034","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515034","url":null,"abstract":"A self-aligned latch-free IGBT, where a trench is located in the middle of p/sup -/ body, has been proposed and verified by process and device simulations. No additional mask steps for n/sup +/ source, p/sup ++/ region and source contact are required so that small size body would be obtained. As the n/sup +/ source is formed by impurity diffused through the sidewall of the trench in the middle of the body, high latch-up capability may be achieved due to the small body resistance and low emitter efficiency of the parasitic n-p-n transistor. Latch-up current densities higher than 10000 A/cm/sup 2/ have been achieved by adjusting the process conditions.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114375251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Oxygen-contamination-free ultra-low-resistance silicided contact technology for high performance power devices 用于高性能电源器件的无氧污染超低阻硅化触点技术
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515077
K. Ino, K. Yamada, G. S. Jong, T. Ohmi
{"title":"Oxygen-contamination-free ultra-low-resistance silicided contact technology for high performance power devices","authors":"K. Ino, K. Yamada, G. S. Jong, T. Ohmi","doi":"10.1109/ISPSD.1995.515077","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515077","url":null,"abstract":"We have developed an ultra-low contact resistance metallization process employing oxygen-contamination-free silicidation technology combined with ion beam mixing technique. Suppression of native-oxide layer formation on the metal surface by use of an in situ formed Si encapsulation layer has resulted in ultra-low metal-to-silicon contact resistances of 3.3/spl times/10/sup -9/ /spl Omega//spl middot/cm/sup 2/ and 7.5/spl times/10/sup -9/ /spl Omega//spl middot/cm/sup 2/ with Ta silicided contacts for n/sup +/-Si and p/sup +/-Si, respectively.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114835733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Thermal stress related packaging failure in power IGBT modules 电源IGBT模块中与热应力相关的封装失效
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515059
Wu-chen Wu, M. Held, P. Jacob, P. Scacco, A. Birolini
{"title":"Thermal stress related packaging failure in power IGBT modules","authors":"Wu-chen Wu, M. Held, P. Jacob, P. Scacco, A. Birolini","doi":"10.1109/ISPSD.1995.515059","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515059","url":null,"abstract":"Thermomechanical stress behavior and its influence on the reliability of large area die bonding of 400 A/1200 V IGBT modules were studied in this paper. The forming and growing process of voids and cracks in the solder layers of fine-prepared IGBT cross sectional samples was quasi-dynamically observed during thermal cycling test. In consideration of the thermal mismatch in IGBT packaging, thermal stress behavior in an IGBT sandwich structure versus temperature changes, was numerically simulated and supported by the experimental results.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121473197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 49
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