Y. Jin, C. Chen, V. Chang, D. Leel, T. Lee, S. Chen, M. Liang
{"title":"Direct measurement of gate oxide damage from plasma nitridation process","authors":"Y. Jin, C. Chen, V. Chang, D. Leel, T. Lee, S. Chen, M. Liang","doi":"10.1109/PPID.2003.1200939","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200939","url":null,"abstract":"Surface voltage (Vsurf) measurements using a non-contact mode measurement (NCMM) tool on bare thick oxide wafers have been widely used for the characterization of plasma charging damage in BEOL processes. In this paper, plasma damage to gate oxide in a plasma nitridation (PN) system has been systematically studied by an NCMM system on bare oxide wafers. The results demonstrate that conventional V/sub surf/ measurement on thick oxide bare wafers has the sensitivity to detect the positive charge induced by the PN process and to characterize the plasma uniformity, but this method might underestimate the damage to gate oxide. It is found that both D/sub it/ and Q/sub tot/ measurements on very thin oxide are more accurate methods to quantify the plasma damage. However, only D/sub it/ correlates well with device performance. The findings of this study provide a time saving and cost effective method for PN process optimization and process monitoring.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117259007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Low charging damage SiO/sub 2/ etching with a low-angle forward reflected neutral beam","authors":"D.H. Lee, M. Chung, S. Jung, G. Yeom","doi":"10.1109/PPID.2003.1200953","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200953","url":null,"abstract":"In this study, energetic reactive radical beams were formed with SF/sub 6/ using a low-angle forward reflected neutral beam technique and the etch properties of SiO/sub 2/ and possible damage induced by the radical beam were investigated. The results showed that when SiO/sub 2/ was etched with the energetic reactive radical beams generated with SF/sub 6/, SiO/sub 2/ etch rates higher than 22 nm/min could be obtained. Also, when the etch damage was studied in terms of the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of metal-nitride-oxide-silicon (MNOS) and metal-oxide-silicon (MOS) devices exposed to the radical beams, nearly no charging damage could be found.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130207113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Plasma induced substrate damage in high dose implant resist strip process","authors":"B. Chan, B. Perng, L. Sheu, Y. Chiu, H. Tao","doi":"10.1109/PPID.2003.1200919","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200919","url":null,"abstract":"In this communication we report our work on the ashing of post high dosage implant photoresist removal. Attention is focused on plasma damage to the silicon substrate, in addition to hard skin removal capabilities. An inductively coupled plasma (ICP) source is chosen for this study due to its capability of separate control of source and bias power, although our results are directly applicable to conventional plasma ashing facilities. Electrical data for both NMOS and PMOS devices are compared and correlated with the physical substrate damage, and suggestions for a residue-free process with minimum substrate damage are given.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"197 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122147746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A fast plasma induced damage monitoring method","authors":"M. Yang, T. Ambrose","doi":"10.1109/PPID.2003.1200933","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200933","url":null,"abstract":"We have developed a new and Fast Feedback Plasma Monitoring Technique (FPMT) to monitor and evaluate the plasma reactor and processes. The FPMT technique measures the slope of flat-band voltage (Vfb) versus oxide thickness of an oxide wafer, and gives reliable results. We discuss the new technique and report some experimental results on plasma charging damage characterization for different commercial available plasma reactors. Furthermore, we discuss the correlation results between full flow Predator data and FPMT data.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127721998","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Chang, C. Chen, C.-L. Wu, D. Lee, T. Lee, S. Chen, M. Liang
{"title":"Effects of plasma-induced damage to ultrathin (/spl les/1.5 nm) gate dielectric on equivalent oxide thickness downscaling using plasma nitridation process","authors":"V. Chang, C. Chen, C.-L. Wu, D. Lee, T. Lee, S. Chen, M. Liang","doi":"10.1109/PPID.2003.1200940","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200940","url":null,"abstract":"Plasma nitridation was used to increase the dielectric constant of SiO/sub 2/ so that the equivalent oxide thickness (EOT) could be reduced. The effects of plasma-induced damage to ultrathin (/spl les/15 A) plasma-nitrided oxide (PNO) on EOT scaling were systematically investigated. The study showed that increasing nitrogen concentrations of PNO using aggressive plasma nitridation failed to reduce the EOT because the plasma-induced parasitic oxidation resulted in a substantial increase in oxide thickness that overrode the dielectric constant increase and consequently increased the EOT. The carrier mobility degradations and higher HF etching rates of PNO demonstrated the damage from plasma nitridation. Although reducing base oxide thickness was able to scale down EOT, the efficiency was extremely poor; a decrease of 1.5 A in base oxide thickness only resulted in 0.3 A of EOT reduction. MOSFET device data and SIMS depth profiles indicated that a thinner base oxide was more susceptible to plasma-induced damage. Finally, this study showed that after optimization, the plasma nitridation process was able to reduce plasma-induced damage so that the EOT could be scaled down without penalties.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132905659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
O. Joubert, E. Pargon, X. Detter, J. Chevolleau, G. Cunge, L. Vallier
{"title":"Critical issues in plasma etching processes involved in the gate etch fabrication of CMOS devices","authors":"O. Joubert, E. Pargon, X. Detter, J. Chevolleau, G. Cunge, L. Vallier","doi":"10.1109/PPID.2003.1199719","DOIUrl":"https://doi.org/10.1109/PPID.2003.1199719","url":null,"abstract":"Plasma processes involved in the fabrication of advanced CMOS devices become increasingly challenging. The increase in complexity comes from the introduction of new materials as well as the decrease in feature dimension. In this paper, we will briefly point out some of the most critical issues that we are facing nowadays at the front end level of the device fabrication.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122635349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Colelli, A. Galbiati, D. Caputo, M. Polignano, V. Soncini, G. Salva
{"title":"Metal contamination monitoring in ion implantation technology","authors":"E. Colelli, A. Galbiati, D. Caputo, M. Polignano, V. Soncini, G. Salva","doi":"10.1109/PPID.2003.1200923","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200923","url":null,"abstract":"In this paper we report the main results obtained through systematic monitoring of metal contamination level on high current ion implanters. The effects of metal contamination on semiconductor devices include oxide degradation, increased leakage current of p-n junctions and reduced minority carrier lifetime. The Surface Photo Voltage (SPV) technique is employed to quantify iron contamination on monitor wafers. The introduction of contamination control charts (iron concentration and diffusion length parameters) for ion implanters is effective in determining some important causes of contamination increase on implanted monitors: silicon-coating progressive erosion of the machine loading disk and specific periodic maintenance performed on the equipment. The results of these analyses allowed us to establish the equipment's disk replacement frequency and to determine the correct requalification procedure of machines after maintenance.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132014420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automated antenna detection and correction methodology in VLSI designs","authors":"V. Shukla, V. Gupta, C. Guruprasad, G. Kadamati","doi":"10.1109/PPID.2003.1200947","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200947","url":null,"abstract":"As more and more devices are packed on a single chip and as the complexities of VLSI designs are increasing, antenna detection and correction is becoming an increasingly challenging task. The paper presents a methodology, which employs a combination of prevention and correction of antennae at various stages of ASIC (Application specific Integrated Circuits) design flow such as cell library development, block design flow and chip design flow. The methodology advocates adding protection diodes only in a certain number of cells in the library. We have implemented this methodology in our ASIC design flow and are able to solve antenna issues in designs with negligible impact on die size (24% increase in die-size in less than 5% of the designs) and performance (0.3%-0.6% worst case impact to delay). By employing this methodology, we found that the number of antennae in the final layout reduced to very small number and even to zero in some cases, and we were able to save the time involved in correcting antennae.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132480080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Lukaszek, M.I. Current, S. Daryanani, L. Larson, T. Rhoad, J. Shields, M. Vella, D. Wagner
{"title":"Investigation of electron-shading effects during high-current ion implants","authors":"W. Lukaszek, M.I. Current, S. Daryanani, L. Larson, T. Rhoad, J. Shields, M. Vella, D. Wagner","doi":"10.1109/PPID.2003.1200952","DOIUrl":"https://doi.org/10.1109/PPID.2003.1200952","url":null,"abstract":"Charging characteristics of As/sup +/, BF/sub 2//sup +/, and B/sup +/ high-current ion implants, performed at different energies and different plasma flood system settings, were measured using bare and resist-covered CHARM/spl reg/-2 wafers patterned with a six-field mask containing holes ranging from 2 /spl mu/m to 0.5 /spl mu/m (clear and resist-covered fields were also used). The results show significant differences in the charging characteristics of high-current ion implanters compared to contemporary plasma-based process tools. The differences appear to be independent of ion energy, but depend on the set-up conditions of the plasma flood system used to limit positive charging caused by the ion beam. In contrast to plasma tools, the implants typically exhibited positive and negative potentials independent of hole size. The positive and negative current densities measured in the resist holes were also independent of hole size (and significantly higher than in the clear field). However, a 500 eV B/sup +/ implant with modern plasma flood control produced positive and negative potentials that scaled with hole size, as expected for electron shading, but with current densities below CHARM/spl reg/-2 detection levels. This establishes an existence proof that optimal plasma flood can achieve near perfect current balance between the positive charging from the ion beam and the negative charging from the flood plasma. Altogether, these results suggest that charging damage in high-current ion implanters should be controllable when implant mask and device features are scaled down.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129848886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A general concept for monitoring plasma induced charging damage","authors":"D. Smeets, A. Martin, A. Scarp","doi":"10.1109/PPID.2003.1199725","DOIUrl":"https://doi.org/10.1109/PPID.2003.1199725","url":null,"abstract":"For many years antenna structures have been successfully applied for detection of charging damage from a variety of sources such as plasma etching, ion implantation and plasma enhanced deposition. In this work a guideline for PID monitoring standardization for JEDEC has been given. A systematic hierarchy approach has been presented in order to be able to establish an automatic data evaluation usable for production monitoring. A minimum set of antenna test structures has been addressed, as well as the correct characterization techniques. It has been shown that a diagnostic stress is required, in order to be able to detect signals when PID issues occur. The large amount of data generated by the monitoring measurements is hardly manageable without an automatic procedure. The definition of such procedure depends on the choice of the monitoring parameters, but aims in any case to reduce the measured parameters to a clear and simple figure of the PID that can be easily trended. Finally, the obtained PID figure can be used to establish wafer scarp criteria based on PID.","PeriodicalId":196923,"journal":{"name":"2003 8th International Symposium Plasma- and Process-Induced Damage.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128800607","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}