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ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference最新文献

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A Novel All - NPN Sample And Hold Circuit 一种新颖的全NPN采样保持电路
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468176
B. Astegher, A. Lechner, H. Jessner
{"title":"A Novel All - NPN Sample And Hold Circuit","authors":"B. Astegher, A. Lechner, H. Jessner","doi":"10.1109/ESSCIRC.1989.5468176","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468176","url":null,"abstract":"This paper describes a monolithic sample and hold circuit with performance competitive with state of the art hybrid systems. It is based on a differential amplifier with gain of unity, which has a feedback loop in the hold mode to ideally get a droop rate of zero. The outstanding electrical characteristics of this S&H - circuit are the 120 MHz 3- dB bandwidth and an acquisition time of only 12 ns.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"154 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121028851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 27 MHz Programmable Module for VSP 一个用于VSP的27mhz可编程模块
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468212
P. Hynes, C. Huizer, J. De Block, P. Sheridan, K. Baker
{"title":"A 27 MHz Programmable Module for VSP","authors":"P. Hynes, C. Huizer, J. De Block, P. Sheridan, K. Baker","doi":"10.1109/ESSCIRC.1989.5468212","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468212","url":null,"abstract":"This paper describes a programmable logic module for the real-time processing of video signals. This module is part of a set of programmable modules, sharing a common communication strategy, that can be combined to realise an Integrated Circuit capable of handling complex video algorithms. The inputs to the module are first selected via a switch matrix and then stored in a two-port dynamic RAM to increase scheduling flexibility. Logic and Arithmetic operations are then performed using an ALU preceded by a set of barrel-shifters. A flexible instruction set is offered by the former, including data-dependent instructions. All sub-blocks are fully programmable using a central program-memory which is loaded via a serial interface. Extensive pipelining and an execution rate of one instruction per clock cycle contribute to a high processing throughput. Parameterized layout generators are used to facilitate ease of modification.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121884098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Total Solution for a 9600 Bits/Sec Modem Transmitterchip 9600位/秒调制解调器发射芯片的整体解决方案
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468102
J. Haspeslagh, W. Sansen
{"title":"A Total Solution for a 9600 Bits/Sec Modem Transmitterchip","authors":"J. Haspeslagh, W. Sansen","doi":"10.1109/ESSCIRC.1989.5468102","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468102","url":null,"abstract":"A single chip analog transmitter (TX-chip) for a V29-V32 9600 bit/sec modem has been implemented in a 3¿ CMOS process. A high level of integration permits a low cost, high performance modem to be built. The TX-chip is composed of as well analog, SC, and digital circuits. The important functions realised are the phasepoint generator, the cosine roll off lowpass filters, the modulator and the programmable equalization filters. The chip occupies 29 mm2 and dissipates 300 mW.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128073151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 1.544 Mb/s CMOS Line Driver for 22.8 Ohm Load 为22.8欧姆负载的1.544 Mb/s CMOS线路驱动器
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468133
H. Herrmann, R. Koch
{"title":"A 1.544 Mb/s CMOS Line Driver for 22.8 Ohm Load","authors":"H. Herrmann, R. Koch","doi":"10.1109/ESSCIRC.1989.5468133","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468133","url":null,"abstract":"A CMOS line driver for the ISDN Primary Access Transceiver IPAT is presented. Operating in bridge configuration a driver pair delivers. 7.2 Vpp output voltage into a differential load of 22.8¿ at a data rate of 1.544 Mb/s (T1 application), using a single 5V supply voltage. The main feature of the single drivers is a control unit which stabilizes the quiescent current in the output stage at 20mA, while the peak output current is 180mA (T1). The circuit can also be logically configurated to deliver 6 Vpp into a differential load of 60¿ with a quiescent current of 7mA and a data rate of 2.048 Mb/s (CEPT application). Because of its large output transistors, the driver pair occupies an area of 6500 square mils in a 2¿m p-well technology.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130392921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
BiCMOS for High Performance Analog and Digital Circuits 用于高性能模拟和数字电路的BiCMOS
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468121
H. Pfleiderer, A. Wieder, K. Hart
{"title":"BiCMOS for High Performance Analog and Digital Circuits","authors":"H. Pfleiderer, A. Wieder, K. Hart","doi":"10.1109/ESSCIRC.1989.5468121","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468121","url":null,"abstract":"As a result of its high packing density, low power dissipation and ease of design, CMOS has in recent years emerged as the standard technology for VLSI circuits. Compared to CMOS, bipolar technology offers better analog features, e.g. offset voltage as well as unique speed advantages. ECL processors, for example, operate at clock rates over 100MHz whereas CMOS processors operate typically at 30MHz. Thus bipolar and CMOS devices form an ideal combination. The only drawback is the higher cost of their fabrication on the same chip. BiCMOS processes are more costly than CMOS processes due to additional masks, processing steps and reduced yield. However, this cost factor is less severe today than in earlier years because of the convergence of bipolar and CMOS technologies. This report describes BiCMOS techniques for high-speed/ high-density circuits for digital as well as analog functions. First the features of MOS and bipolar devices are compared. The different aspects of designing a BiCMOS process are described next. Finally the advantages of the BiCMOS technology for systems applications are demonstrated.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122071175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Worst Case Design and Datasheet Generation Techniques for Analog Silicon Compilers 模拟硅编译器的最坏情况设计和数据表生成技术
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468146
B. Goffart, J. Jongsma, M. Degrauwe
{"title":"Worst Case Design and Datasheet Generation Techniques for Analog Silicon Compilers","authors":"B. Goffart, J. Jongsma, M. Degrauwe","doi":"10.1109/ESSCIRC.1989.5468146","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468146","url":null,"abstract":"Worst case design and datasheet generation techniques for analog circuits, based on analytic expressions, are presented. They take into account temperature, bias current and technology parameter fluctuations. The techniques which have been implemented in an analog design system, operating with \"design strategies\" as well as \"numerical optimization methods\", do not degrade significantly the design time.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122840695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
RIM: Routing Into Macrocells and application to an arithmetic processor 路由到宏单元和应用到一个算术处理器
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468181
A. Guyot
{"title":"RIM: Routing Into Macrocells and application to an arithmetic processor","authors":"A. Guyot","doi":"10.1109/ESSCIRC.1989.5468181","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468181","url":null,"abstract":"This paper presents first a silicon assembler and then a router. The two programs have to be described together since the router uses tracks, terminals and obstacles that are build by the assembler. Using tracks that run inside the macrocells dramatically reduces the area demanded for routing. An example of assembling and routing of a mathematicalfunctions processor [1,2,3] is provided at the end of the paper.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122847663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 2nd Generation 32b RISC Processor with 4KByte Cache 第二代32b RISC处理器，4KByte缓存
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468057
A. Thomas, J. Urquhart, D. Howard, H. E. Oldham, S. Furber
{"title":"A 2nd Generation 32b RISC Processor with 4KByte Cache","authors":"A. Thomas, J. Urquhart, D. Howard, H. E. Oldham, S. Furber","doi":"10.1109/ESSCIRC.1989.5468057","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468057","url":null,"abstract":"This paper describes ARM3, a second generation RISC microprocessor. The device is a 32-bit CPU, with a 4KByte on-chip cache and a co-processor interface. Two asynchronous clocks are used to ensure that the speed of internal cache cycles is not compromised by the speed of the external memory system, thus permitting the device to be used with low-cost DRAMs. The chip has been fabricated on a 1.5¿m DLM CMOS foundry process and prototypes have operated at over 25 MIPS peak.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124272175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Flexible Module Library for Custom DSP Applications in a Multiprocessor Environment 多处理器环境下定制DSP应用的灵活模块库
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/4.102666
E. Blokken, H. De Keulenaer, F. Catthoor, H. de Man
{"title":"A Flexible Module Library for Custom DSP Applications in a Multiprocessor Environment","authors":"E. Blokken, H. De Keulenaer, F. Catthoor, H. de Man","doi":"10.1109/4.102666","DOIUrl":"https://doi.org/10.1109/4.102666","url":null,"abstract":"In this paper, the module library for the CATHEDRAL-II synthesis environment is discussed. The underlying architectural style is defined as a hierarchical composition of flexible and parameterizable data-paths, microcoded control units, interprocessor communication protocols and I/O interfaces. This paper discusses the module library for the data-paths. The general philosophy behind this library, the implementation strategy, some special features and some results from measurement and testing are presented.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"195 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131835665","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 18
ESPRIT VLSI Design Skills Training Action ESPRIT VLSI设计技能培训行动
ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference Pub Date : 1989-09-01 DOI: 10.1109/ESSCIRC.1989.5468017
K. Wolcken
{"title":"ESPRIT VLSI Design Skills Training Action","authors":"K. Wolcken","doi":"10.1109/ESSCIRC.1989.5468017","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1989.5468017","url":null,"abstract":"","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131777194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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