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2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)最新文献

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Versatile HV lateral JFETs design in a 0.18μm SOI superjunction BCD technology 采用0.18μm SOI超结BCD技术的多功能高压横向jfet设计
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694449
Y. Hao, U. Kuniss, G. Kittler, A. Hoelke
{"title":"Versatile HV lateral JFETs design in a 0.18μm SOI superjunction BCD technology","authors":"Y. Hao, U. Kuniss, G. Kittler, A. Hoelke","doi":"10.1109/ISPSD.2013.6694449","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694449","url":null,"abstract":"This paper presents versatile HV lateral JFET design method on 0.18μm SOI BCD technology to achieve variable Vth(threshold voltage) and Idsat, without DIBL effect over full operating Vds range and scalable breakdown voltage capability on both N-ch and P-ch JFET. The significant advantage of a HV JFET compared to depletion MOSFET is the lower area consumption in real circuit design which due to higher Idsat values at Vgs=0V.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127824481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A balanced High Voltage IGBT design with ultra dynamic ruggedness and area-efficient edge termination 一个平衡的高压IGBT设计，具有超动态的坚固性和面积高效的边缘终端
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694393
Ze Chen, Katsumi Nakamura, A. Nishii, T. Terashima, T. Kawakami
{"title":"A balanced High Voltage IGBT design with ultra dynamic ruggedness and area-efficient edge termination","authors":"Ze Chen, Katsumi Nakamura, A. Nishii, T. Terashima, T. Kawakami","doi":"10.1109/ISPSD.2013.6694393","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694393","url":null,"abstract":"In this paper, a balanced High Voltage (HV) IGBT is presented. The proposed HV IGBT is composed of three technologies: Wide Cell Pitch CSTBTTM(III) for cell structure, Partial P collector utilizing LPT(II) buffer for vertical structure, and a novel area-efficient edge termination design. We called the above edge termination design “Linearly-narrowed Field Limiting Ring (LNFLR)”. The experiment results of a balanced 4500 V class IGBT show that the device maintains an excellent dynamic ruggedness with a 50% cut in edge termination width comparing to the conventional Field Limiting Ring (FLR) design. Moreover, optimizing fabrication process can further widen the process window for LNFLR dose.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115523392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Direct liquid cooling module with high reliability solder joining technology for automotive applications 直接液冷模块，具有高可靠性焊接技术，适用于汽车应用
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694408
A. Morozumi, H. Hokazono, Y. Nishimura, Y. Ikeda, Y. Nabetani, Yoshikazu Takahashi
{"title":"Direct liquid cooling module with high reliability solder joining technology for automotive applications","authors":"A. Morozumi, H. Hokazono, Y. Nishimura, Y. Ikeda, Y. Nabetani, Yoshikazu Takahashi","doi":"10.1109/ISPSD.2013.6694408","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694408","url":null,"abstract":"We developed the direct-liquid-cooling IGBT module which enabled downsizing of a power control unit for HEV system and high reliability simultaneously. This module eliminates thermal grease by unifying a ceramic substrate and a heat sink. It contributes this module realized the reduction of thermal resistance 30 % compared to the conventional indirect liquid cooling type. High thermal conductive Si3N4 ceramics for the substrate and lightweight aluminum heat sink that are suitable for automotive use demand are applied. The technological challenge of this module is to overcome the decrease of the reliability of the joint by large CTE mismatch between substrate and heat sink. We developed the Sn-Sb based solder material which can attain high reliability for automotive use with large CTE mismatch components. And IGBT module with this new solder is applied to HEV.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117067847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 29
Novel 200V power devices with large current capability and high reliability by inverted HV-well SOI technology 采用倒置高压井SOI技术设计的新型200V大电流、高可靠性电源器件
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694442
Siyang Liu, Weifeng Sun, Tingting Huang, Chunwei Zhang
{"title":"Novel 200V power devices with large current capability and high reliability by inverted HV-well SOI technology","authors":"Siyang Liu, Weifeng Sun, Tingting Huang, Chunwei Zhang","doi":"10.1109/ISPSD.2013.6694442","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694442","url":null,"abstract":"Novel 200V power devices, including the n-type lateral insulator gate bipolar transistor (nLIGBT), the n-type lateral extended drain MOS (nLEDMOS) and the p-type lateral extended drain MOS (pLEDMOS), have been fabricated by using the special 0.5μm inverted HV-well SOI technology. All the novel devices own larger current density, higher off-state breakdown voltage (BV) and better hot-carrier reliability comparing with the conventional devices. The improved devices have been successfully used for the plasma display panel (PDP) scan driver IC and reduce the chip size by 27%.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116017431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Novel 3.3-kV advanced trench HiGT with low loss and low dv/dt noise 新型3.3 kv先进沟槽HiGT，低损耗，低dv/dt噪声
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694391
Y. Toyota, So Watanabe, Taiga Arai, M. Wakagi, M. Mori, Masashi Shinagawa, K. Azuma, Yuji Shima, T. Oda, Y. Toyoda, K. Saito
{"title":"Novel 3.3-kV advanced trench HiGT with low loss and low dv/dt noise","authors":"Y. Toyota, So Watanabe, Taiga Arai, M. Wakagi, M. Mori, Masashi Shinagawa, K. Azuma, Yuji Shima, T. Oda, Y. Toyoda, K. Saito","doi":"10.1109/ISPSD.2013.6694391","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694391","url":null,"abstract":"Novel 3.3-kV trench IGBT with low loss and low dv<sub>AK</sub>/dt noise was developed. The structural feature of the IGBTs is deep p-WELL layers separated from trench gates. This structure suppresses excess V<sub>GE</sub> overshoot and then reduces recovery dv<sub>AK</sub>/dt. Moreover, this effect is enhanced by reducing the resistance of the deep p-WELL layers (R<sub>FP</sub>). It was found that, for the first time, the trade-off characteristics between V<sub>CEsat</sub> and recovery dv<sub>AK</sub>/dt were drastically improved by separating p-WELL layers from trench gates and decreasing R<sub>FP</sub>. The recovery dv<sub>AK</sub>/dt could be reduced by 79% more than that for the conventional trench IGBT, maintaining a small V<sub>CEsat</sub> and E<sub>on</sub> equal to the conventional one.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127386395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 28
Sub-micron junction termination for 1200V class devices toward CMOS process compatibility 面向CMOS工艺兼容的1200V级器件亚微米结终端
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694441
K. Seto, Junpei Takaishi, Hironori Imaki, Masahiro Tanaka, M. Tsukuda, I. Omura
{"title":"Sub-micron junction termination for 1200V class devices toward CMOS process compatibility","authors":"K. Seto, Junpei Takaishi, Hironori Imaki, Masahiro Tanaka, M. Tsukuda, I. Omura","doi":"10.1109/ISPSD.2013.6694441","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694441","url":null,"abstract":"This study shows, for the first time, possibility of very shallow junction termination in submicron scale. The 2D-TCAD simulations unveil even 0.2μm junction depth structures are capable of blocking 1200V and usability for power devices with more than two hundreds of guard rings. Very shallow structure has robustness against diffusion depth deviation by special guard ring arrangement.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127022469","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Advanced direct-water-cool power module having pinfin heatsink with low pressure drop and high heat transfer 先进的直接水冷电源模块，具有低压降和高传热的引脚散热器
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694407
K. Horiuchi, A. Nishihara, M. Mori, T. Kurosu
{"title":"Advanced direct-water-cool power module having pinfin heatsink with low pressure drop and high heat transfer","authors":"K. Horiuchi, A. Nishihara, M. Mori, T. Kurosu","doi":"10.1109/ISPSD.2013.6694407","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694407","url":null,"abstract":"In the direct-water-cooled power module, there is a small gap between the heatsink and the channel wall. This gap results in bypass flow that reduces the pressure drop while maintaining high heat transfer. In this paper, we discuss the effect of this gap on both pressure drop and heat transfer over pinfin heatsinks using our semi-analytical model based on mass, momentum, and energy conservation within two control volumes. The first control volume in the model is located within the finned area, and the second one is located in the gap between the tip of the pins and the flow channel. Dimensionless pressure drops could be predicted within an error of 30%, and the predicted Nusselt numbers agreed within an error of 50%.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130014638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Vertical power diodes in bulk GaN 体GaN中的垂直功率二极管
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694455
D. Disney, H. Nie, A. Edwards, D. Bour, H. Shah, I. Kizilyalli
{"title":"Vertical power diodes in bulk GaN","authors":"D. Disney, H. Nie, A. Edwards, D. Bour, H. Shah, I. Kizilyalli","doi":"10.1109/ISPSD.2013.6694455","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694455","url":null,"abstract":"Vertical diodes with breakdown voltages up to 2.6kV have been fabricated on bulk GaN substrates. The measured figures-of-merit of these devices show performance near the theoretical limit of GaN. These vertical GaN diodes exhibit robust avalanche breakdown behavior with a positive temperature coefficient. System-level performance advantages have been demonstrated in power conversion applications. Statistical data have been collected from thousands of devices. Initial reliability tests have been completed.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126338202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 52
Approach to the silicon limit: Advanced NLDMOS in 0.13 μm SOI technology for automotive and industrial applications up to 110V 接近硅极限:先进的NLDMOS 0.13 μm SOI技术，用于高达110V的汽车和工业应用
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694421
Hongning Yang, Jiang-Kai Zuo, Zhihong Zhang, W. Min, Xin Lin, Xu Cheng, M. Ger, P. Hui, P. Rodriquez
{"title":"Approach to the silicon limit: Advanced NLDMOS in 0.13 μm SOI technology for automotive and industrial applications up to 110V","authors":"Hongning Yang, Jiang-Kai Zuo, Zhihong Zhang, W. Min, Xin Lin, Xu Cheng, M. Ger, P. Hui, P. Rodriquez","doi":"10.1109/ISPSD.2013.6694421","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694421","url":null,"abstract":"We report our development of a novel NLDMOS in SOI based smart power technology, integrated into Freescale's 0.13μm CMOS platform. The new NLDMOS not only achieves BVDSS up to 140V in both low side and high side operations, but more importantly, the Rdson*Area is able to shrink at least 35-40% below the current benchmark, which is the lowest reported for BVDSS ranging from 50V to 138V. For the first time, we demonstrated LDMOS devices which approach the Si limit. The devices also achieve very competitive performance in both SOA and the reliability tests under HCI stress as well as high temperature reverse bias (HTRB) stress.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122954963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
SiC symmetric blocking terminations using orthogonal positive bevel termination and Junction Termination Extension 采用正交正斜角端接和结端延伸的SiC对称阻塞端接
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694475
Xing Huang, B. Baliga, A. Huang, A. Suvorov, C. Capell, Lin Cheng, A. Agarwal
{"title":"SiC symmetric blocking terminations using orthogonal positive bevel termination and Junction Termination Extension","authors":"Xing Huang, B. Baliga, A. Huang, A. Suvorov, C. Capell, Lin Cheng, A. Agarwal","doi":"10.1109/ISPSD.2013.6694475","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694475","url":null,"abstract":"Symmetric blocking power semiconductor switches require two edge terminations, one for the reverse blocking junction and the other one for the forward blocking junction. In this work, we demonstrated 1100V SiC symmetric blocking edge terminations using orthogonal positive bevel (OPB) termination and a one-zone Junction Termination Extension (JTE). The OPB was formed by orthogonally sawing 45° V-shape trenches into the SiC wafer with a diamond-coated dicing blade. The surface damage was then repaired with dry-etch in SF6/O2 plasma, which reduced the leakage current by around two orders of magnitude. As limited by field reach-through, both the OPB and the JTE terminations show breakdown voltage of 1100V. The P+P-N+ diodes fabricated on the same wafer with the OPB termination showed 1610V avalanche breakdown which was around 83% of ideal value.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131531764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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