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2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)最新文献

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A high reliable reverse-conducting IGBT with a floating P-plug 具有浮动p插头的高可靠反导IGBT
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694437
Weizhong Chen, Zehong Li, M. Ren, Jin-ping Zhang, Bo Zhang, Yong Liu, Qing Hua, Kun Mao, Zhaoji Li
{"title":"A high reliable reverse-conducting IGBT with a floating P-plug","authors":"Weizhong Chen, Zehong Li, M. Ren, Jin-ping Zhang, Bo Zhang, Yong Liu, Qing Hua, Kun Mao, Zhaoji Li","doi":"10.1109/ISPSD.2013.6694437","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694437","url":null,"abstract":"A current distribution model is presented for the RC-IGBTs both at IGBT mode and DIODE mode. According to the analytical model, smaller cell size would be better for the distribution of the current density and full utilization of the silicon, but the snapback would be worse. Then a novel RC-IGBT with a floating P-plug is proposed and investigated by simulations. The results show that it can suppress the snapback phenomena effectively. More importantly, the silicon utilization ratio is much higher than the others RC-IGBTs and the current is uniformly distributed in the whole wafer both at IGBT mode and DIODE mode that ensured the high temperature reliability of the RC-IGBT.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126857218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Low reverse recovery charge 30-V power MOSFETs for DC-DC converters 用于DC-DC转换器的低反向恢复电荷30 v功率mosfet
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-26 DOI: 10.1109/ISPSD.2013.6694456
T. Hirao, T. Hashimoto, N. Shirai, Hiroki Arai, N. Matsuura, H. Matsuura
{"title":"Low reverse recovery charge 30-V power MOSFETs for DC-DC converters","authors":"T. Hirao, T. Hashimoto, N. Shirai, Hiroki Arai, N. Matsuura, H. Matsuura","doi":"10.1109/ISPSD.2013.6694456","DOIUrl":"https://doi.org/10.1109/ISPSD.2013.6694456","url":null,"abstract":"Two low reverse recovery charge solutions for 30-V power MOSFETs are proposed. One solution is a device consisting of a MOSFET and a Schottky barrier diode (SBD) in a single chip featuring a double epi structure to enhance the breakdown voltage. The other solution is a device with an integrated SBD in every unit cell that can achieve a high threshold voltage via the P- layer with Schottky contact. Both proposed devices exhibited low reverse recovery currents in simulations. Moreover, the surge voltage of the first device which we fabricated reduced by 58%, which enables the use of a lower voltage device and a reduction of the device loss.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121647079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Interdigitated LDMOS 互相交叉LDMOS
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-05-01 DOI: 10.1109/ispsd.2013.6694462
Jaejune Jang, Kyuheon Cho, D. Jang, Minhwan Kim, Changjoon Yoon, Junsung Park, H.-S. Oh, Chiho Kim, Hyoungsoo Ko, Keunho Lee, Sangbae Yi
{"title":"Interdigitated LDMOS","authors":"Jaejune Jang, Kyuheon Cho, D. Jang, Minhwan Kim, Changjoon Yoon, Junsung Park, H.-S. Oh, Chiho Kim, Hyoungsoo Ko, Keunho Lee, Sangbae Yi","doi":"10.1109/ispsd.2013.6694462","DOIUrl":"https://doi.org/10.1109/ispsd.2013.6694462","url":null,"abstract":"Novel Interdigitated LDMOS is experimented resulting in best in class R<sub>SP</sub>-BV<sub>DSS</sub> performance (21.8mΩ-mm<sup>2</sup> with BV<sub>DSS</sub> of 47V) in comparison to published LDMOS. R<sub>SP</sub> improvement is made through additional current path by removing STI region in drift area. Breakdown voltage is maintained with lateral field plate effect from side of the current path. Proposed Interdigitated LDMOS satisfies reliability criteria (HCI, snap back) as 40V device. All of this is obtained without any process change.","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122582859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
GaN HEMTs power module package design and performance evaluation GaN hemt功率模块封装设计与性能评估
2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) Pub Date : 2013-04-22 DOI: 10.1109/PEDS.2013.6526995
Chung-Hsiang Ho, Po-Chien Chou, Stone Cheng
{"title":"GaN HEMTs power module package design and performance evaluation","authors":"Chung-Hsiang Ho, Po-Chien Chou, Stone Cheng","doi":"10.1109/PEDS.2013.6526995","DOIUrl":"https://doi.org/10.1109/PEDS.2013.6526995","url":null,"abstract":"This paper described the electronic performance of power module packaged high-power AlGaN/GaN high electron mobility transistors (HEMTs) on silicon substrate. Sixteen GaN chips are mounted on one AlN substrate. There are three AlN substrate in one module. Each device is wire-bonded in parallel connection to increase the power rating. Both DC and pulsed current-voltage (ID-VDS) characteristics are measured for different connection and sizes of devices, at various of power densities, pulse lengths, and duty factors. We found some conditions that makes the parallel connection difference down to zero. According that, The GaN has maxima drain current=5.98A(98.8%).","PeriodicalId":175520,"journal":{"name":"2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114275240","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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