K. Seto, Junpei Takaishi, Hironori Imaki, Masahiro Tanaka, M. Tsukuda, I. Omura
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Sub-micron junction termination for 1200V class devices toward CMOS process compatibility
This study shows, for the first time, possibility of very shallow junction termination in submicron scale. The 2D-TCAD simulations unveil even 0.2μm junction depth structures are capable of blocking 1200V and usability for power devices with more than two hundreds of guard rings. Very shallow structure has robustness against diffusion depth deviation by special guard ring arrangement.