2016 IEEE International Reliability Physics Symposium (IRPS)最新文献

筛选
英文 中文
Interposer FPGA with self-protecting ESD design for inter-die interfaces and its CDM specification 具有自保护ESD的芯片间接口介面FPGA设计及其CDM规范
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574556
J. Karp, M. Hart, M. Fakhruddin, V. Kireev, Phoumra Tan, D. Tsaggaris, Mini Rawat
{"title":"Interposer FPGA with self-protecting ESD design for inter-die interfaces and its CDM specification","authors":"J. Karp, M. Hart, M. Fakhruddin, V. Kireev, Phoumra Tan, D. Tsaggaris, Mini Rawat","doi":"10.1109/IRPS.2016.7574556","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574556","url":null,"abstract":"Methodology proposed that relates 200V CDM voltage specification of S20.20-2014 standard to a realistic 100-200mA CDM peak current for inter-die interfaces. Tribology is considered to be the source of charge accumulation on the bare die during 3D/2.5D assembly. Bare die self-capacitance is introduced as a CDM modeling parameter in the environment of 3D/2.5D assembly. HBM/CDM qualification with respect to the S20.20-2014 standard is demonstrated for self-protecting die-to-die IOs in the second generation 20nm interposer FPGA.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115236251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Muon-induced soft errors in 16-nm NAND flash memories 16纳米NAND闪存中介子诱导的软误差
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574552
M. Bagatin, S. Gerardin, A. Paccagnella, A. Visconti, S. Beltrami, M. Bertuccio, K. Ishida, C. Frost, A. Hillier, V. Ferlet-Cavrois
{"title":"Muon-induced soft errors in 16-nm NAND flash memories","authors":"M. Bagatin, S. Gerardin, A. Paccagnella, A. Visconti, S. Beltrami, M. Bertuccio, K. Ishida, C. Frost, A. Hillier, V. Ferlet-Cavrois","doi":"10.1109/IRPS.2016.7574552","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574552","url":null,"abstract":"Flash memories based on the floating gate architecture are sensitive to ionizing radiation at sea level, including atmospheric neutrons and alpha particles. No data are available on the sensitivity of Flash memories to muons. These particles, although very lightly ionizing, are the most abundant at sea level and have been reported to cause upsets in advanced SRAMs through direct ionization. The purpose of this contribution is to present the first experimental investigation of single event upsets induced by muons in 16-nm NAND Flash memories, using accelerated tests. The experimental results are discussed in terms of threshold voltage shifts and raw bit errors and the threshold LET values are analyzed for advanced samples. We show that muon-induced upsets are indeed possible also in Flash memories, even though the error rate is very low and ECC can easily cope with it.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134088188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Aging of I/O overdrive circuit in FinFET technology and strategy for design optimization FinFET中I/O超速驱动电路的老化及设计优化策略
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574592
S. E. Liu, M. Yu, Y. Chen, J. Jao, M. Z. Lin, Y. Fang, M. Lin
{"title":"Aging of I/O overdrive circuit in FinFET technology and strategy for design optimization","authors":"S. E. Liu, M. Yu, Y. Chen, J. Jao, M. Z. Lin, Y. Fang, M. Lin","doi":"10.1109/IRPS.2016.7574592","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574592","url":null,"abstract":"We investigated aging property of FinFET-based I/O overdrive circuits (IP) and proposed design strategies of optimization among performance/area/reliability. Aging behavior of I/O overdrive IP with 16nm FinFET process has been extracted and compared with 20nm planar-transistor process. Both pulldown and pull-up driving degradation are worse in the FinFET than planar IP. An aging simulation framework was built from transistor-level aging databases and further calibrated by an empirical equation and IP-level measurements. Finally, a design guideline was discussed and proposed to pursue balance of performance/area/reliability, which is thus improved 13%/8%/37% respectively in our optimized design.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121417073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Study of oxygen vacancy in high-k gate dielectric by charge injection technique 电荷注入技术研究高k栅极介质中氧空位
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574534
P. Liao, S. Gao, K. Joshi, Y. Lee, T. -. Lee, H. Wang, S. Chien, J. Wang, J. Shih, K. Wu
{"title":"Study of oxygen vacancy in high-k gate dielectric by charge injection technique","authors":"P. Liao, S. Gao, K. Joshi, Y. Lee, T. -. Lee, H. Wang, S. Chien, J. Wang, J. Shih, K. Wu","doi":"10.1109/IRPS.2016.7574534","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574534","url":null,"abstract":"A new technique by charge injection is introduced to investigate the charging effect on weak oxide in the gate stack of high-k metal gate process. The oxide with extra oxygen vacancy is more vulnerable to process charging, as verified by the correlation of Vt vs. subthreshold swing degradation, SILC spectrum, and chemical bonding state analysis using X-ray photoelectron spectroscopy (XPS) and electron energy loss spectroscopy (EELS). Degradation of pFET threshold voltage (Vt) shift by gate injection under Source/Drain (S/D) floating condition is observed, this is attributed to the oxide damage by the accelerated carriers from S/D reverse bias. The convolution of “random dopant fluctuation (RDF) + charging effect” is expected to magnify devices Vt shift, especially for those worse bit cells with high Vt as verified by the Monte-Carlo simulation. We further demonstrate that process with tighten Vt distribution, such as FinFET technology with less implant process and better charge release immunity, is less vulnerable to the charging induced Vt shift.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116093817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Spatio-temporal mapping of device temperature due to self-heating in Sub-22 nm transistors 亚22纳米晶体管自热器件温度的时空映射
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574647
M. A. Wahab, S. Shin, M. Alam
{"title":"Spatio-temporal mapping of device temperature due to self-heating in Sub-22 nm transistors","authors":"M. A. Wahab, S. Shin, M. Alam","doi":"10.1109/IRPS.2016.7574647","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574647","url":null,"abstract":"With the increase of transistor density and adoption of novel geometries, such as, FinFET, ETSOI, and gate-all-around nanowire (GAA NW) transistors, self-heating has emerged as a persistent concern for modern ICs. Various reliability issues, such as, NBTI, HCI, PBTI, and TDDB depend sensitively on channel temperature, ΔTc(x, y, z;t), due to self-heating. An accurate spatio-temporal map of channel temperature is essential for Fin/NW-resolved reliability/lifetime of sub-22 nm technology nodes. In this paper, we demonstrate that (i) none of the existing techniques, in isolation, can map the NW-resolved channel temperature of modern transistors, and (ii) only a collection of orthogonal techniques (multiprobe approach) or novel test structures (material approach), integrated/interpreted through self-consistent electro-thermal simulation, can map the temperature in sufficient detail necessary for reliability prediction.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114924219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Nondiffusive heat dissipation from a pulse-heated conductive filament in RRAM 随机存取存储器中脉冲加热导电灯丝的非扩散散热
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574544
K. Regner, J. Malen
{"title":"Nondiffusive heat dissipation from a pulse-heated conductive filament in RRAM","authors":"K. Regner, J. Malen","doi":"10.1109/IRPS.2016.7574544","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574544","url":null,"abstract":"Here, we discuss experimental and theoretical studies of nondiffusive thermal transport, which occurs when geometrical length scales are comparable to energy carrier mean free paths (MFPs). We expand upon a previous study that emphasizes the importance of nondiffusive thermal transport in resistive-switching random access memory (RRAM). To model this behavior, an approximate solution to the Boltzmann transport equation (BTE), under the relaxation time approximation in the cylindrical geometry, is derived for the case of an arbitrary, temporally periodic surface temperature boundary condition. This boundary condition coupled with the BTE more realistically models switching stimuli in an RRAM device.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124922063","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On conduction mechanisms through SiN/AlGaN based gate dielectric and assessment of intrinsic reliability 基于SiN/AlGaN栅极介质的传导机理及内在可靠性评估
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574585
A. Banerjee, P. Vanmeerbeek, L. de Schepper, S. Vandeweghe, P. Coppens, P. Moens
{"title":"On conduction mechanisms through SiN/AlGaN based gate dielectric and assessment of intrinsic reliability","authors":"A. Banerjee, P. Vanmeerbeek, L. de Schepper, S. Vandeweghe, P. Coppens, P. Moens","doi":"10.1109/IRPS.2016.7574585","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574585","url":null,"abstract":"The first section of this article focuses on the investigations of the gate leakage conduction mechanisms under forward and reverse bias conditions using temperature dependent Jg-Eg characteristics on a Silicon Nitride (SiN)/AlGaN based Metal-Insulator-Semiconductor (MIS) structure. TCAD study under forward bias conduction show majority of the voltage drop on the SiN layer only. The model fitting the electrical characteristics was observed to be Poole-Frenkel (PF) emission. Under reverse bias condition, the entire voltage drop occurs on the entire SiN/AlGaN/GaN. The conduction mechanism responsible for the leakage was found to be Fowler-Nordheim (FN) tunneling along with a thermionic emission component. Second section of this article focuses on the Time Dependent Dielectric Breakdown (TDDB) measurements and lifetime extrapolation of the SiN/AlGaN based di-electric stack. TDDB measurements were done under constant field stress for different temperatures. Normalization of the data exhibited only field accelerated degradation with no influence from the temperature.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116300599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Analysis of ESD effects on organic thin-film-transistors by means of TLP technique 用TLP技术分析静电放电对有机薄膜晶体管的影响
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574607
N. Wrachien, M. Barbato, A. Cester, A. Rizzo, G. Meneghesso, R. D'Alpaos, G. Turatti, G. Generali, M. Muccini
{"title":"Analysis of ESD effects on organic thin-film-transistors by means of TLP technique","authors":"N. Wrachien, M. Barbato, A. Cester, A. Rizzo, G. Meneghesso, R. D'Alpaos, G. Turatti, G. Generali, M. Muccini","doi":"10.1109/IRPS.2016.7574607","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574607","url":null,"abstract":"We analyzed the effects of Electrostatic Discharge events on large area high voltage Organic Thin Film Transistors, using the transmission line pulsing technique. These transistors survived ESD events exceeding 500V. A partial dielectric breakdown occurred at voltage higher tan 600V. Small mobility and threshold voltage variations are observed, prior to breakdown.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122175834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Voltage acceleration and pulse dependence of barrier breakdown in MgO based magnetic tunnel junctions MgO基磁隧道结势垒击穿的电压加速和脉冲依赖
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574620
S. Van Beek, K. Martens, P. Roussel, G. Donadio, J. Swerts, S. Mertens, A. Thean, G. Kar, A. Furnémont, G. Groeseneken
{"title":"Voltage acceleration and pulse dependence of barrier breakdown in MgO based magnetic tunnel junctions","authors":"S. Van Beek, K. Martens, P. Roussel, G. Donadio, J. Swerts, S. Mertens, A. Thean, G. Kar, A. Furnémont, G. Groeseneken","doi":"10.1109/IRPS.2016.7574620","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574620","url":null,"abstract":"STT-MRAM is a promising non-volatile memory. For reliable lifetime predictions, a correct voltage acceleration model is essential. However, there is no consensus over what acceleration model to use. In this paper we study barrier breakdown time over an extended time range. With a maximum likelihood ratio method, we test the statistical significance of fits for different voltage acceleration models. We find that the power law best describes voltage acceleration. In addition we observe that the breakdown time is independent of duty cycle or pulse width.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125812271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Semi-empirical interconnect resistance model for advanced technology nodes: A model apt for materials selection based upon test line resistance measurements 先进技术节点的半经验互连电阻模型:基于测试线电阻测量的材料选择模型
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-09-26 DOI: 10.1109/IRPS.2016.7574615
P. Roussel, I. Ciofi, R. Degraeve, V. V. Gonzalez, N. Jourdan, R. Baert, D. Linten, J. Bommels, Z. Tokei, G. Groeseneken, A. Thean
{"title":"Semi-empirical interconnect resistance model for advanced technology nodes: A model apt for materials selection based upon test line resistance measurements","authors":"P. Roussel, I. Ciofi, R. Degraeve, V. V. Gonzalez, N. Jourdan, R. Baert, D. Linten, J. Bommels, Z. Tokei, G. Groeseneken, A. Thean","doi":"10.1109/IRPS.2016.7574615","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574615","url":null,"abstract":"A semi-empirical interconnect resistance model apt for fitting wire resistance data is presented. The model combines grain boundary and sidewall scattering effects with the impact of Line Edge Roughness (LER). After calibration onto experimental meander-fork structure resistance measurements, extrapolation of the model to future technology nodes reveals that for ultra-narrow line widths a better LER control will be imperative. The model is also intended for inclusion of more accurate, geometry dependent interconnect and via resistance estimators in higher abstraction level simulators, enabling a more realistic assessment of the impact of BEOL parasitics on circuit delay and power at advanced technology nodes.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126826731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信