Aging of I/O overdrive circuit in FinFET technology and strategy for design optimization

S. E. Liu, M. Yu, Y. Chen, J. Jao, M. Z. Lin, Y. Fang, M. Lin
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引用次数: 6

Abstract

We investigated aging property of FinFET-based I/O overdrive circuits (IP) and proposed design strategies of optimization among performance/area/reliability. Aging behavior of I/O overdrive IP with 16nm FinFET process has been extracted and compared with 20nm planar-transistor process. Both pulldown and pull-up driving degradation are worse in the FinFET than planar IP. An aging simulation framework was built from transistor-level aging databases and further calibrated by an empirical equation and IP-level measurements. Finally, a design guideline was discussed and proposed to pursue balance of performance/area/reliability, which is thus improved 13%/8%/37% respectively in our optimized design.
FinFET中I/O超速驱动电路的老化及设计优化策略
研究了基于finfet的I/O过载电路(IP)的老化特性,提出了性能/面积/可靠性的优化设计策略。提取了16nm FinFET工艺的I/O超速驱动IP的老化行为,并与20nm平面晶体管工艺进行了比较。在FinFET中,下拉和上拉驱动性能都比平面IP更差。利用晶体管级老化数据库构建了老化仿真框架,并通过经验方程和ip级测量对其进行了进一步校准。最后,讨论并提出了追求性能/面积/可靠性平衡的设计准则,优化设计结果分别提高了13%/8%/37%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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