2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)最新文献_第5页

Failure Analysis on TiAl Metallization Process for Ohmic Contact on 4H-SiC pMOSFET 4H-SiC pMOSFET欧姆接触TiAl金属化工艺失效分析

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984917

C. Hung, Jung-Chien Cheng, B. Tsui

引用次数: 1

Impacts of Channel Doping on NBTI Reliability and Variability in Nanoscale FinFETs 通道掺杂对纳米finfet中NBTI可靠性和可变性的影响

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984834

Zhe Zhang, Runsheng Wang, Yangyuan Wang, Ru Huang

引用次数: 0

Challenge and solution for characterizing NBTI-generated defects in nanoscale devices 纳米器件中nbti缺陷表征的挑战与解决方案

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984899

J. F. Zhang, R. Gao, Z. Ji, W. Zhang

{"title":"Challenge and solution for characterizing NBTI-generated defects in nanoscale devices","authors":"J. F. Zhang, R. Gao, Z. Ji, W. Zhang","doi":"10.1109/IPFA47161.2019.8984899","DOIUrl":"https://doi.org/10.1109/IPFA47161.2019.8984899","url":null,"abstract":"Negative bias temperature instability (NBTI) is a well known ageing process for CMOS technologies. Many early works were focused on large devices where device-to-device variations (DDV) are negligible. As device sizes downscale to nanometers, DDV becomes substantial. NBTI is a stochastic process and causes a time-dependent DDV. Characterizing the NBTI-generated defects in nanoscale devices has two main challenges. First, current fluctuates with time and this introduces uncertainties in measurements. Second, the test time is long and costly: to characterize the NBTI-induced DDV, it is essential to repeat the same test on multiple devices. This work reviews recent progresses in addressing these issues. Based on the As-grown-Generation (AG) model, it will be shown that the measurement uncertainties are dominated by As-grown hole traps and can be removed by subtracting the average value. To reduce the test time, the voltage step stress (VSS) technique is combined with the Stress-Discharge -Recharge (SDR) method. This VSS-SDR technique reduces test time to within one hour per device. The model extracted by VSS-SDR is verified by comparing its prediction with the test data obtained under conventional constant voltage stress.","PeriodicalId":169775,"journal":{"name":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129003164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Optical Failure Analysis on Pulsed Signals Embedded in Logic Cloud – A Case Study of Laser Voltage Tracing 逻辑云中嵌入脉冲信号的光学失效分析——以激光电压跟踪为例

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984860

Yuzhu Sun, Daisy Lu, D. Mark, C. Di, Jenny Fan, N. Leslie

引用次数: 0

Advanced Method to Locate The Defect on Zener Diode to Avoid Cutting The Circuit in Failure Analysis 故障分析中齐纳二极管缺陷定位避免切断电路的先进方法

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984819

Xuejian Qian, Li Tian, Gaojie Wen, Hao Zhang, Xiaocui Li

{"title":"Advanced Method to Locate The Defect on Zener Diode to Avoid Cutting The Circuit in Failure Analysis","authors":"Xuejian Qian, Li Tian, Gaojie Wen, Hao Zhang, Xiaocui Li","doi":"10.1109/IPFA47161.2019.8984819","DOIUrl":"https://doi.org/10.1109/IPFA47161.2019.8984819","url":null,"abstract":"Due to metal layers coverage, many signals couldn’t be measured by mechanical probe test to perform electrical isolation. And usually EMMI[1] (Emission Microscope) or OBIRCH[2] (Optical Beam Induced Resistor Change) analysis can’t directly highlight the real defect for function failure. It’s difficult to isolate Zener diode failure because the current path which through others device. We can’t test the Zener diode leakage directly unless to cut the circuit to isolate the Zener diode alone. In the paper we proposed one novel and effective method for locating Zener diode defect on device level to avoid the irreversible destructive test. The main idea was that if there is a defect on Zener diode in spite we can’t find a leakage effected by others circuit but we can find the voltage is abnormal. Then we can use the function EMMI[3] to location the defect instead of cut the circuit to isolate the Zener diode alone. After PFA (Physical Failure Analysis), the defect was found. Thus, we believe the advantage measurement method is novel, effective and save cycle time. It was beneficial to our FA for Zener diode on device level in electrical failure isolation.","PeriodicalId":169775,"journal":{"name":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126871346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Robust Dual Directional SCR without Current Saturation Effect for ESD Applications 用于ESD应用的无电流饱和效应的鲁棒双向可控硅

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984838

Feibo Du, Xiaoyu Dong, Chengjin Yang, Yichen Xu, Zhiwei Liu, Jizhi Liu, J. Liou

引用次数: 0

Light-Illumination-Induced Degradation and Its Long-Term Recovery in Indium-Tin-Zinc Oxide Thin-Film Transistors 铟锡锌氧化物薄膜晶体管的光致降解及其长期恢复

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984822

Meng Zhang, Xiaotong Ma, Zhendong Jiang, Sunbin Deng, Guijun Li, Rongsheng Chen, Yan Yan, M. Wong, H. Kwok

引用次数: 1

Root Cause Analysis on Analog Circuit Using TR-LADA 基于TR-LADA的模拟电路根本原因分析

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984900

Lua Winson, P. Angeline, G. Ranganathan, A. Girish, Ravikumar Venkat Krishnan

引用次数: 0

The probe marker discoloration on Al pad and wafer storage 铝衬垫和晶圆存储的探针标记变色

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984909

W. Hsieh, Henry Lin, Vincent Chen, Irene Ou, Y. Lou

{"title":"The probe marker discoloration on Al pad and wafer storage","authors":"W. Hsieh, Henry Lin, Vincent Chen, Irene Ou, Y. Lou","doi":"10.1109/IPFA47161.2019.8984909","DOIUrl":"https://doi.org/10.1109/IPFA47161.2019.8984909","url":null,"abstract":"In this report, a novel probe marker discoloration corrosion on Al pad, with donut/circle shape, was found. This probe marker discoloration corrosion was found at the stage of blue tape. Back to check the wafer process, no clear corrosion was found before CP probing test. In order to identify the microstructure & components of this probe marker discoloration corrosion, SEM/EDS, TEM/EELS & AES analysis were applied. These structure & surface analysis results indicated this discoloration is a combination of Aluminum, Fluorine and Oxygen. No Fluoride was detected on the normal region of Al pad. All these results implied the role of fluorine element to induce this probe marker discoloration corrosion. The source of F element is critical in this case, so the testing and storage conditions would be supposed to be important for the formation of probe marker discoloration corrosion. The HAST testing with condition of temperature 130°C and RH 85% for 21 hours, all the chip samples were simulated to have been exposed in air without N2 cabinet storage or MBB bag storage for 1 year. This HAST test result showed none of exhibition of discoloration or existed discoloration chips being deteriorated. Another storage test based on regular full wafer FOSB storage showed existed discoloration chips being deteriorated. This FOSB storage test indicated the source of corrosive F element maybe come from wafer itself. The EDS element mapping data indicated the F element enriched Al pad on wafer extreme edge area was clearly identified. The source of F element was found. And the storage of processed wafer would play a key role in the formation of discoloration corrosion.","PeriodicalId":169775,"journal":{"name":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127678845","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Enhancement of localization capability of lock-in thermography for power semiconductor devices by searching high-emissivity films 搜索高发射率薄膜增强功率半导体器件锁定热成像的定位能力

2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2019-07-01 DOI: 10.1109/IPFA47161.2019.8984828

N. Chinone, T. Matsumoto, K. Koshikawa

引用次数: 0