Yuzhu Sun, Daisy Lu, D. Mark, C. Di, Jenny Fan, N. Leslie
{"title":"逻辑云中嵌入脉冲信号的光学失效分析——以激光电压跟踪为例","authors":"Yuzhu Sun, Daisy Lu, D. Mark, C. Di, Jenny Fan, N. Leslie","doi":"10.1109/IPFA47161.2019.8984860","DOIUrl":null,"url":null,"abstract":"LVx, including Laser Voltage Imaging(LVI) and Laser Voltage Probing(LVP), is an indispensable optical failure analysis tool set for design debug and yield ramp-up. Although LVI and LVP together provide a good coverage for failure analysis cases involving scan-chain functionality testing, their applicability remains limited when addressing pulsed signals from logic circuits with ever growing complexity. Laser Voltage Tracing(LVT), as a recent addition to the LVx suite, provides a global map, highlighting the active region with low duty-cycle voltage transition pattern. In this paper, we present a case study of the detection of timing abnormality for a waveform feature with <0.1% duty cycle by applying LVT. Complemented by LVP and Soft Defect Localization (SDL), the fault was localized down to two interconnected logic gates. Resistive interconnection was confirmed with Physical Failure Analysis(PFA).","PeriodicalId":169775,"journal":{"name":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Optical Failure Analysis on Pulsed Signals Embedded in Logic Cloud – A Case Study of Laser Voltage Tracing\",\"authors\":\"Yuzhu Sun, Daisy Lu, D. Mark, C. Di, Jenny Fan, N. Leslie\",\"doi\":\"10.1109/IPFA47161.2019.8984860\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"LVx, including Laser Voltage Imaging(LVI) and Laser Voltage Probing(LVP), is an indispensable optical failure analysis tool set for design debug and yield ramp-up. Although LVI and LVP together provide a good coverage for failure analysis cases involving scan-chain functionality testing, their applicability remains limited when addressing pulsed signals from logic circuits with ever growing complexity. Laser Voltage Tracing(LVT), as a recent addition to the LVx suite, provides a global map, highlighting the active region with low duty-cycle voltage transition pattern. In this paper, we present a case study of the detection of timing abnormality for a waveform feature with <0.1% duty cycle by applying LVT. Complemented by LVP and Soft Defect Localization (SDL), the fault was localized down to two interconnected logic gates. Resistive interconnection was confirmed with Physical Failure Analysis(PFA).\",\"PeriodicalId\":169775,\"journal\":{\"name\":\"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA47161.2019.8984860\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA47161.2019.8984860","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optical Failure Analysis on Pulsed Signals Embedded in Logic Cloud – A Case Study of Laser Voltage Tracing
LVx, including Laser Voltage Imaging(LVI) and Laser Voltage Probing(LVP), is an indispensable optical failure analysis tool set for design debug and yield ramp-up. Although LVI and LVP together provide a good coverage for failure analysis cases involving scan-chain functionality testing, their applicability remains limited when addressing pulsed signals from logic circuits with ever growing complexity. Laser Voltage Tracing(LVT), as a recent addition to the LVx suite, provides a global map, highlighting the active region with low duty-cycle voltage transition pattern. In this paper, we present a case study of the detection of timing abnormality for a waveform feature with <0.1% duty cycle by applying LVT. Complemented by LVP and Soft Defect Localization (SDL), the fault was localized down to two interconnected logic gates. Resistive interconnection was confirmed with Physical Failure Analysis(PFA).