IEEE Journal of the Electron Devices Society最新文献_第5页

An Accurate Electrical and Thermal Co-Simulation Framework for Modeling High-Temperature DC and Pulsed I - V Characteristics of GaN HEMTs

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-01-10 DOI: 10.1109/JEDS.2025.3528307

Yicong Dong;Eiji Yagyu;Takashi Matsuda;Koon Hoo Teo;Chungwei Lin;Shaloo Rakheja

{"title":"An Accurate Electrical and Thermal Co-Simulation Framework for Modeling High-Temperature DC and Pulsed I - V Characteristics of GaN HEMTs","authors":"Yicong Dong;Eiji Yagyu;Takashi Matsuda;Koon Hoo Teo;Chungwei Lin;Shaloo Rakheja","doi":"10.1109/JEDS.2025.3528307","DOIUrl":"https://doi.org/10.1109/JEDS.2025.3528307","url":null,"abstract":"High-electron mobility transistors (HEMTs) employing AlGaN/GaN heterostructures are suitable for high-power and high-frequency applications. To meet target specifications, GaN HEMTs must be designed and optimized by accurately considering the coupling of electrical and thermal characteristics, from the static to the pulsed regimes of operation. Toward this, we implement an electro-thermal modeling and simulation framework for experimentally fabricated GaN on SiC HEMTs and use the framework to predict the high-temperature performance of the technology, up to 448 K. We utilize the transient measurement data at different ambient temperatures to extract the trap characteristics, which are important to understand from the RF dispersion perspective. Our work highlights the significance of the thermal boundary conditions at the source, drain, and gate metal electrodes and the impact of heat dissipation paths on the lattice temperature rise and I-V characteristics. Overall, our work provides a physical insight into the thermal response of GaN HEMTs and can facilitate suitable thermal management strategies of the device over a broad range of DC and transient operating conditions.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"54-65"},"PeriodicalIF":2.0,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10836823","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143106748","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Call for Nominations for Editor-in-Chief 征集总编辑提名

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-01-07 DOI: 10.1109/JEDS.2024.3489072

引用次数: 0

IEEE ELECTRON DEVICES SOCIETY 电子器件学会

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2025-01-07 DOI: 10.1109/JEDS.2023.3348195

引用次数: 0

Foreword Special Issue on the 5th Latin American Electron Device Conference 第五届拉丁美洲电子器件会议特刊

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2024-12-30 DOI: 10.1109/JEDS.2024.3518273

Lluís F. Marsal;Arturo Escobosa;Benjamin Iñiguez;Fernando Guarín

引用次数: 0

Golden List of Reviewers for 2024 2024年评论家金名单

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2024-12-30 DOI: 10.1109/JEDS.2024.3512073

引用次数: 0

Impact of Self-Heating Effect on DC and AC Performance of FD-SOI CMOS Inverter 自热效应对FD-SOI CMOS逆变器直流和交流性能的影响

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2024-12-27 DOI: 10.1109/JEDS.2024.3523286

Kang Hee Lee;Mincheol Kim;Jongmin Lee;Jang Hyun Kim

{"title":"Impact of Self-Heating Effect on DC and AC Performance of FD-SOI CMOS Inverter","authors":"Kang Hee Lee;Mincheol Kim;Jongmin Lee;Jang Hyun Kim","doi":"10.1109/JEDS.2024.3523286","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3523286","url":null,"abstract":"We analyzed the impact of self-heating effect (SHE) on fully depleted-silicon on insulator (FD-SOI) CMOS inverter at the 28 nm technology node, considering both DC and AC operations. Specifically, we focused on investigating the principles behind how SHE influences inverter operating characteristics. To analyze the operating characteristics, we employed 2-D technology computer-aided design (TCAD) mixed mode simulation by Synopsys SentaurusTM. In DC operation, the maximum lattice temperature for n-MOSFET and p-MOSFET are 436 K and 449 K, respectively, resulting in a current degradation of 7.9%. Due to the shifted p/n ratio, the gain also varied, with values of 3.65 V/V for without SHE and 4.21 V/V for with SHE. In AC operation, the maximum temperature varies for each operating frequency: 439 K, 358 K, 324 K, and 319 K, from 10 MHz to 4 GHz. Consequently, the rate of p/n ratio deviation and the rate of voltage change over time vary accordingly. SHE exhibits a faster rate of change, showing a difference of 5.43% at 10 MHz. Analysis of propagation delay through an inverter chain showed a 10% increase at 10 MHz. The results indicate that with SHE, the propagation delay increases, and the slew rate becomes steeper, suggesting improved switching characteristics and gain. However, this unintended consequence highlights the necessity of considering SHE-induced changes in CMOS inverter design to ensure reliable operation.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"41-48"},"PeriodicalIF":2.0,"publicationDate":"2024-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10816664","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142938464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Trap-Assisted Photomultiplication-Type Organic Photodetector With High Detectivity From Visible to Shortwave Infrared Light

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2024-12-27 DOI: 10.1109/JEDS.2024.3523394

Jingwen Chen;Claire Qing-Ying Huang;Xin Zhang;Sheng Dong;Xiye Yang

{"title":"A Trap-Assisted Photomultiplication-Type Organic Photodetector With High Detectivity From Visible to Shortwave Infrared Light","authors":"Jingwen Chen;Claire Qing-Ying Huang;Xin Zhang;Sheng Dong;Xiye Yang","doi":"10.1109/JEDS.2024.3523394","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3523394","url":null,"abstract":"This letter reports a trap-assisted photomultiplication-type organic photodetector (PM-OPD) with a broad sensing range from 400 to 1400 nm. By easily tunning the donor/acceptor ratio in bulk-heterojunction layer consisting Poly([2,6’-4,8-di(5-ethylhexylthienyl)benzo[1,2-b;3,3-b]dithiophene]{3-fluoro-2[(2-ethylhexyl)carbonyl] thieno[3,4-b]thiophenediyl}) (PTB7-Th) and a novel non-fullerene acceptor (NFA) pendant 2,2’-(((2,5-bis(2-octyldodecyl)-3,6-dioxo-2,3,5,6-tetrahydropyrrolo [3,4-c]pyrrole-1,4-diyl)bis(thiophene-5,2-diyl))bis(4-oxonaphthalene-3(4H)-yl-1(4H)-ylidene)) dimalononitrile named DPP-QC, the device shows specifically a high external quantum efficiency (EQE) value of 112% and specific detectivity (D*) over <inline-formula> <tex-math>$10^{10}$ </tex-math></inline-formula> Jones at 1200 nm at a light intensity of 0.108 mW/cm2. Meanwhile the PM-OPD shows ultra-fast response time <inline-formula> <tex-math>$t_{r}$ </tex-math></inline-formula> and <inline-formula> <tex-math>$t_{f}$ </tex-math></inline-formula> of 4.1 <inline-formula> <tex-math>$mu $ </tex-math></inline-formula>s and 4.3 <inline-formula> <tex-math>$mu $ </tex-math></inline-formula>s on microsecond (<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>s) scale. Our work proves that PM-type shortwave infrared (SWIR) OPD can simultaneously achieve high responsivity, broad-spectral response, fast response and well photodiode characteristics.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"73-78"},"PeriodicalIF":2.0,"publicationDate":"2024-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10816666","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143106746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Novel Triple Diode Solar Cells Equivalent Circuit Models With Lambert W Function Expressions 基于Lambert W函数表达式的新型三二极管太阳能电池等效电路模型

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2024-12-26 DOI: 10.1109/JEDS.2024.3523278

Martin Ćalasan;Snežana Vujošević

引用次数: 0

Charge-Based Compact Modeling of OECTs for Neuromorphic Applications 神经形态应用中基于电荷的oect紧凑建模

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2024-12-25 DOI: 10.1109/JEDS.2024.3522577

Ghader Darbandy;Malte Koch;Lukas M. Bongartz;Karl Leo;Hans Kleemann;Alexander Kloes

{"title":"Charge-Based Compact Modeling of OECTs for Neuromorphic Applications","authors":"Ghader Darbandy;Malte Koch;Lukas M. Bongartz;Karl Leo;Hans Kleemann;Alexander Kloes","doi":"10.1109/JEDS.2024.3522577","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3522577","url":null,"abstract":"Organic electrochemical transistors (OECTs) are a class of promising neuromorphic devices due to their exceptional conductivity, ease of fabrication, and cost-effectiveness. These devices exhibit ionic behavior similar to biological synapses, enabling efficient switching. Developing a compact model for OECTs is challenging due to the complex interplay of electrochemical reactions, ion transport, interactions with electrons or holes, and charge carrier dynamics that must be accurately captured and integrated into a simplified framework. In this work, we develop a combined physics-based compact model that integrates the Nernst equation from electrochemistry with thermally activated charges from semiconductor physics. This model enables easy incorporation into circuit simulations and provides a simple core framework for further extensions to account for additional effects. We fabricated, characterized, and analyzed OECTs based on PEDOT:PSS, and the proposed compact model shows good agreement with our experimental data.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"34-40"},"PeriodicalIF":2.0,"publicationDate":"2024-12-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10816051","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142938368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Physics-Based SPICE-Compatible Compact Model of FLASH Memory With Poly-Si Channel for Computing-in-Memory Applications 基于物理的spice -兼容的具有多晶硅通道的闪存紧凑型模型，用于内存计算应用

IF 2 3区工程技术

IEEE Journal of the Electron Devices Society Pub Date : 2024-12-04 DOI: 10.1109/JEDS.2024.3511581

Jung Rae Cho;Donghyun Ryu;Donguk Kim;Wonjung Kim;Yeonwoo Kim;Changwook Kim;Yoon Kim;Myounggon Kang;Jiyong Woo;Dae Hwan Kim

{"title":"Physics-Based SPICE-Compatible Compact Model of FLASH Memory With Poly-Si Channel for Computing-in-Memory Applications","authors":"Jung Rae Cho;Donghyun Ryu;Donguk Kim;Wonjung Kim;Yeonwoo Kim;Changwook Kim;Yoon Kim;Myounggon Kang;Jiyong Woo;Dae Hwan Kim","doi":"10.1109/JEDS.2024.3511581","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3511581","url":null,"abstract":"Recently, three-dimensional FLASH memory with multi-level cell characteristics has attracted increasing attention to enhance the capabilities of artificial intelligence (AI) by leveraging computingin-memory (CIM) systems. The focus is to maximize the computing performance and design FLASH memory suitable for various AI algorithms, where the memory must achieve a highly controllable multi-level threshold voltage (VT). Therefore, we developed a SPICE compact model that can rapidly simulate charge trap FLASH cells for CIM to identify optimal programming conditions. SPICE simulation results of the transfer characteristics are in good agreement with the results of experimentally fabricated FLASH memory, showing a low error rate of 10%. The model was also validated against the results obtained from the TCAD tool, showing that a consistent VT change was computed in a shorter time than that required using TCAD. Then, the developed model was used to comprehensively investigate how single or multiple gate voltage (VG) pulses affect VT. Moreover, considering recent FLASH memory fabrication processes, we found that grain boundaries in polycrystalline silicon channel materials can be involved in deteriorating gate controllability. Therefore, optimizing the pulse scheme by correcting potential errors identified in advance through fast SPICE simulation can enable the accurate achievement of the specific analog states of the FLASH cells of the CIM architecture, boosting computing performance.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"1-7"},"PeriodicalIF":2.0,"publicationDate":"2024-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10778276","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142938369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0