Cryogenic InP HEMTs With Enhanced fmax and Reduced On-Resistance Using Double Recess

IF 2 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Yuxuan Chen;Fugui Zhou;Yongheng Gong;Yongbo Su;Wuchang Ding;Jingyuan Shi;Peng Ding;Zhi Jin
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引用次数: 0

Abstract

Cryogenic InP High-electron-mobility transistors (HEMTs)-based low-noise amplifiers (LNAs) have been applied in deep space exploration, which demands high performance from InP HEMTs. Specifically, at low temperatures, the device needs to achieve low power consumption and high operating frequency. In this study, we fabricated a double-recessed InP HEMT with a heavily doped In0.65Ga0.35As/In0.53Ga0.47As/In0.52Al0.48As multilayer cap structure to optimize the device’s performance at low temperatures. At low temperatures, excessive on-resistance (RON) leads to increased power dissipation and also contributes to higher noise, which affects the performance of the LNAs. We employed the heavily doped In0.65Ga0.35As layer to reduce the metal-semiconductor contact resistance, thereby effectively lowering RON. Experimental results show that at 7 K, the device’s RON is $410~\Omega \cdot \mu $ m, which could effectively reduce the power dissipation. Additionally, we adopted a double-recessed gate structure. This structure significantly improves the device’s maximum oscillation frequency( $f_{\max }$ ) by reducing the parasitic capacitance. At 7 K, the device’s $f_{\max }$ reaches 740GHz. Furthermore, the design of the second gate recess reduces the exposed area of the gate recess, which combined with the $\rm Si_{3}N_{4}$ passivation layer, effectively suppresses the kink effect caused by surface traps at low temperatures, further improving the device’s cryogenic performance.
利用双凹槽增强fmax和降低导通电阻的低温InP hemt
低温InP高电子迁移率晶体管(hemt)低噪声放大器(LNAs)已经应用于深空探测,这对InP hemt的性能提出了更高的要求。具体来说,在低温下,器件需要实现低功耗和高工作频率。为了优化器件的低温性能,我们制作了一种重掺杂In0.65Ga0.35As/In0.53Ga0.47As/In0.52Al0.48As多层帽结构的双槽InP HEMT。在低温条件下,导通电阻(RON)过高会增加器件的功耗,同时也会导致噪声升高,从而影响lna的性能。我们采用重掺杂的In0.65Ga0.35As层来降低金属-半导体接触电阻,从而有效降低RON。实验结果表明,在7 K时,器件的RON为$410~\Omega \cdot \mu $ m,可以有效地降低功耗。此外,我们采用了双凹槽闸门结构。这种结构通过减小寄生电容显著提高了器件的最大振荡频率($f_{\max }$)。在7 K时,该设备的$f_{\max }$达到740GHz。此外,第二栅极凹槽的设计减小了栅极凹槽的暴露面积,结合$\rm Si_{3}N_{4}$钝化层,有效抑制了低温下表面陷阱引起的扭结效应,进一步提高了器件的低温性能。
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来源期刊
IEEE Journal of the Electron Devices Society
IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology
CiteScore
5.20
自引率
4.30%
发文量
124
审稿时长
9 weeks
期刊介绍: The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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