M. Alam, Gary H. Bernstein, Jeffrey Bokor, David Carlton, X. Hu, S. Kurtz, B. Lambson, M. Niemier, W. Porod, M. Siddiq, E. Varga
{"title":"Experimental progress of and prospects for nanomagnet logic (NML)","authors":"M. Alam, Gary H. Bernstein, Jeffrey Bokor, David Carlton, X. Hu, S. Kurtz, B. Lambson, M. Niemier, W. Porod, M. Siddiq, E. Varga","doi":"10.1109/SNW.2010.5562573","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562573","url":null,"abstract":"We present the current state-of-the-art of nanomagnetic logic (NML), which is one of the beyond-Moore device technologies being pursued within the SRC-NRI (Nanoelectronics Research Initiative). Advantages of NML include low power and non-volatility. We show that all key ingredients for NML architectures have been demonstrated - including logic, fan-out, and on-chip clock structures. Input and output can be accomplished in a fashion similar to MRAM technology. As such, NML is CMOS compatible.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"41 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79705126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ashok Kumar, T. Mizutani, K. Shimizu, T. Tsunomura, A. Nishida, K. Takeuchi, S. Inaba, S. Kamohara, K. Terada, T. Hiramoto
{"title":"Origin of “current-onset voltage” variability in scaled MOSFETs","authors":"Ashok Kumar, T. Mizutani, K. Shimizu, T. Tsunomura, A. Nishida, K. Takeuchi, S. Inaba, S. Kamohara, K. Terada, T. Hiramoto","doi":"10.1109/SNW.2010.5562596","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562596","url":null,"abstract":"Present work analyzes the cause of “current-onset voltage” variability, which has been newly found to largely affect drain current variability [1]. It is found by 3D device simulation that the “current-onset voltage” variability is determined by how largely the channel potential fluctuates by random dopant disposition. Reducing RDF will suppress both threshold voltage and current-onset voltage variability as well.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"108 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75803222","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Internal structure and electrical properties of Ge quantum dot in single-electron transistors","authors":"K. H. Chen, I. Chen, P. W. Li","doi":"10.1109/SNW.2010.5562546","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562546","url":null,"abstract":"We have developed a simple, manageable, and self-organized manner — thermally oxidizing SiGe nanocavity for precisely controlling Ge quantum dot (QD) number, position, and tunnel path, which is crucial for effective single-electron tunneling devices. The internal structure properties of Ge QDs were systematically characterized. The effectiveness of Ge QD placement is evidenced by high performance Ge QD single electron transistors (SETs), featuring with clear Coulomb staircase and Coulomb-blockade oscillation behaviors at room temperature.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"16 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74816847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"CMOS-compatible fabrication of room-temperature Ge QD single hole transistors","authors":"I. Chen, K. H. Chen, H. Chou, Pei-Wen Li","doi":"10.1109/SNW.2010.5562548","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562548","url":null,"abstract":"Precise control on quantum dot (QD) number and tunnel path in a self-organized manner is crucial for effective single electron tunneling. We experimentally demonstrated a single Ge QD (∼10 nm) self-aligned with nickel-silicide electrodes via Si3N4/SiO2 tunnel barriers by thermally oxidizing a SiGe nanorod. The fabricated Ge QD single hole transistor (SHT) features with clear differential conductance and Coulomb-blockade oscillation behaviors at near room temperature.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"32 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77970650","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Π-gate nanowires TANOS poly-Si TFT nonvolatile memory","authors":"Min-Feng Hung, Jiang-Hung Chen, Yung-Chun Wu","doi":"10.1109/SNW.2010.5562547","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562547","url":null,"abstract":"This work we demonstrate a TANOS nonvolatile memory (NVM) with poly-Si nanowire (NW) channels and Pi-gate (Π-gate) structure. Π-gate structure in this TANOS NVM increase on current (I<inf>on</inf>), decrease threshold voltage (V<inf>th</inf>) and subthreshold slope (SS), and enlarge the memory window (ΔV<inf>th</inf>). This NVM device behaves fast program/erase (P/E) speed; 3 V memory window can be achieved by applying 18 V in 10 µs. The 70 % of initial memory window has been maintained after 10<sup>4</sup> P/E-cycle stress.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"55 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86873424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Moraru, R. Nakamura, Sakito Miki, T. Mizuno, M. Tabe
{"title":"Control of dopant-induced quantum dots by channel geometry","authors":"D. Moraru, R. Nakamura, Sakito Miki, T. Mizuno, M. Tabe","doi":"10.1109/SNW.2010.5562584","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562584","url":null,"abstract":"We show that single electron transport through discrete dopants can be realized by controlling the channel geometry and utilizing the favorable effect of a statistical number of dopants. This may allow control for new applications such as dopant-based turnstiles.4,5","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"19 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81183072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Evaluation of adhesion materials for gold line-and-space surface plasmon antenna on SOI-MOS photodiode","authors":"H. Satoh, Yuki Matsuo, H. Inokawa, A. Ono","doi":"10.1109/SNW.2010.5562555","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562555","url":null,"abstract":"In order to improve the light sensitivity of silicon-on-insulator metal-insulator-semiconductor (SOI-MOS) photodiode, differences caused by the adhesion materials for gold (Au) line-and-space (L/S) surface plasmon (SP) antenna are evaluated based on the electromagnetic simulation. Furthermore, the rejection ratio for polarized light with silicon nitride (Si3N4) adhesion layer is analyzed.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"20 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87371634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance characteristics of strongly correlated bilayer graphene for post-CMOS logic devices","authors":"B. Dellabetta, M. J. Gilbert","doi":"10.1109/SNW.2010.5562544","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562544","url":null,"abstract":"Post-CMOS logic in bilayer graphene is very promising due to the possibility of observing room temperature collective states. We present calculations of graphene bilayers and the conditions necessary for excitonic superfluidity. At room temperature, the maximum current the condensate can support is increased over low temperature values and we can achieve negative differential resistances greater than 3 orders of magnitude between the condensate current and the non-interacting quasiparticle current which flows after exceeding the maximum current.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"56 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74909542","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Tight-binding study of size and geometric effects on hole effective mass of silicon nanowires","authors":"Naoya Moriokaa, H. Yoshioka, J. Suda, T. Kimoto","doi":"10.1109/SNW.2010.5562567","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562567","url":null,"abstract":"The present tight-binding study of rectangular SiNWs along [001], [110], and [111] revealed that the hole m* of [001] and [110] NWs on the {001} basal face has strong dependence on the width. Because this nature may make the design of devices difficult, these NWs are considered to be unfavorable for p-channel devices. In contrast, rectangular [111] NWs on both (112̄) and (1̄10) basal faces are favorable for p-channel devices because they have the smallest hole m* and its value is very resistant to the variability of the width.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"9 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74051201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling hole effective mass of Si modulated by external field","authors":"Y. Omura","doi":"10.1109/SNW.2010.5562574","DOIUrl":"https://doi.org/10.1109/SNW.2010.5562574","url":null,"abstract":"Figure 1 shows the confinement effective mass (m*zz,2D-hole,n-par(001)) dependence on tS for Fext=104 V/cm; the transport effective mass (m*xx,2D-hole,n-par(001)) and bulk mass values are also shown for comparison. It is seen that in such a low field the 2-D heavy hole mass value (m*zz,2D-hole,n-par(001)) decreases as tS increases for the parameters appearing in [5], although the 2-D heavy hole mass (m*zz,2D-hole,n-par(001)) slightly increases as tS increases for the parameters appearing in [6], almost holding its bulk value. On the other hand, the light hole mass value increases as tS increases regardless of parameters. Subsequently, the impact of band nonparabolicity on the 2-D hole effective mass of valence band holes appears for a large range of tS. This is directly related the magnitude of band bending in the Si layer; the perturbation energy is roughly expressed by (1/2)etSFext and this reduces the hole energy. In contrast to the behavior of the confinement effective mass, the estimated transport effective mass along the kx axis (m*xx,2D-hole,n-par(001)) is almost free from confinement. This behavior is specified only for the (001) surface, but the transport effective mass for the (011) surface is sensitive to confinement (not shown here). If the physical confinement is normal to the (011) surface, we can see that this is due to the weak sensitivity of hole band dispersion to the external field because the ground-state level energy of 2-D holes is determined by the heavy hole mass.","PeriodicalId":6433,"journal":{"name":"2010 Silicon Nanoelectronics Workshop","volume":"13 1","pages":"1-2"},"PeriodicalIF":0.0,"publicationDate":"2010-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74449942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}