{"title":"Compact Modeling of Process Variation and Reliability Predictions for Nanosheet Gate-All-Around FET","authors":"Mengge Jin;Chao Wang;Siyi Xu;Yang Shen;Yuhang Zhang;Bingyi Ye;Shaoqiang Chen;Xinyu Dong;Fei Lu;Ziyu Liu;Xiaojin Li;Yanling Shi;Yabin Sun","doi":"10.1109/TDMR.2025.3589379","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3589379","url":null,"abstract":"In this work, a semi-analytical compact model is developed to quantify the impact of random process variations on nanosheet field-effect transistors (NSFETs) at the 3nm technology node. Three primary sources of variability work function variation (WFV), line width roughness (LWR), and gate edge roughness (GER) are systematically analyzed. By extracting and calibrating empirical parameters, the proposed model accurately captures the statistical trends of process-induced fluctuations across a broad range of conditions. The model is integrated into the BSIM-CMG framework for circuit-level variability assessment, enabling comprehensive evaluation of performance deviations. Simulation results indicate that WFV dominates the overall reliability degradation, leading to energy variations from -12% to +24%. This study provides a refined predictive framework for assessing process-induced reliability risks and optimizing circuit design in advanced semiconductor technologies.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"707-713"},"PeriodicalIF":2.3,"publicationDate":"2025-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Application of New Criteria for Predicting Crack Initiation From the Interface Corner in the Molded Underfill Flip-Chip Package Under Thermal Load","authors":"Guang-Chao Lyu;Min-Bo Zhou;Xin-Ping Zhang","doi":"10.1109/TDMR.2025.3586592","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3586592","url":null,"abstract":"Cracking at corner points or edges of multi-material interfaces has long been a critical reliability concern for engineered components and structures. In particular, accurate prediction of failure risks due to interface crack and delamination in advanced electronic packages is highly demanded for improvement of the reliability and the integrated circuit (IC) product yield. This study proposes a new approach, which combines the asymptotic stress solution at the singularity with the maximum average tangential stress (MATS) and maximum tangential strain (MTSN) criteria, to predict the crack initiation angle and critical fracture conditions. The proposed approach is first validated against the experimental results for silicon/glass anode bonds subjected to biased three-point bending as reported in the literature, demonstrating its accuracy and reliability. Further, and more importantly, the validated criteria are applied to analyze the cracking behavior of a typical molded underfill flip-chip (MUF FC) package under both heating and cooling loads. The predicted crack initiation angles are close to the analytical results derived from the fracture mechanics parameters obtained by finite element analysis. The present study has moved the reliability assessment forward to establish a practical and reliable framework for predicting the crack initiation at the interface corner of the MUF FC package structure, which is also highly anticipated to be used in other advanced electronic packages.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"723-733"},"PeriodicalIF":2.3,"publicationDate":"2025-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shi-Kai Shi;Han-Lin Zhao;Xiao-Lin Wang;Sung-Jin Kim
{"title":"Solution-Processed In₂O₃ Doped 2-D MoS₂ Thin-Film Transistors With Improvement of Electrical Properties by UV/Ozone Treatment","authors":"Shi-Kai Shi;Han-Lin Zhao;Xiao-Lin Wang;Sung-Jin Kim","doi":"10.1109/TDMR.2025.3581148","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3581148","url":null,"abstract":"In this paper, channel layer films of indium oxide (In2O3) solution doped with molybdenum disulfide (MoS2) were prepared at low temperature (250°C). Then the electrical properties of thin-film transistors (TFTs) devices were investigated using ultraviolet/ozone (UV/Ozone) treatment process. The results show that the selection of the appropriate time for the UV/Ozone treatment process can effectively improve the electrical properties of In2O3-MoS2 TFTs devices, leading to the preparation of reliable electronic devices at low temperatures. Specifically, the 40 s UV/Ozone treatment TFTs have relatively high saturation mobility of <inline-formula> <tex-math>$2.08~pm ~0.02$ </tex-math></inline-formula> cm2V<inline-formula> <tex-math>${}^{-}1 $ </tex-math></inline-formula> s<inline-formula> <tex-math>${}^{-}1 $ </tex-math></inline-formula> and on/off current ratio of <inline-formula> <tex-math>$3.09times 10{^{{6}}}$ </tex-math></inline-formula>, as well as relatively low threshold voltage and subthreshold swing values of <inline-formula> <tex-math>$3.74~pm ~0.03$ </tex-math></inline-formula> V and <inline-formula> <tex-math>$0.61~pm ~0.01$ </tex-math></inline-formula> V, and stable electrical properties after 30 days of exposure to ambient air. The UV/Ozone treatment resulted in stable electrical characteristics compared to devices that were not treated with the process, which has potential in electronics applications and is expected to be widely used in semiconductors for a variety of emerging electronic devices.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"594-600"},"PeriodicalIF":2.3,"publicationDate":"2025-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Metastable Operating Stability of Perovskite/Silicon Tandem Solar Cell Modules","authors":"Zhenzhu Zhao;Fei Wang;Pengxu Chen;Mulin Sun;Yuhui Ji;Yutao Wang;Shuangbiao Xia;Na Wang;Fan Xu;Hanlin Hu;Kexin Yao;Liping Zhang;Jian Yu;Honghai Xiao;Chen Yang;Zhengxin Liu;Jiakai Liu;Qin Hu;Wenzhu Liu","doi":"10.1109/TDMR.2025.3583339","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3583339","url":null,"abstract":"The performance of perovskite/silicon tandem solar cells (PTSCs) has achieved remarkable progress in recent years, showing the great potential of commercialization. Nevertheless, the operational stability of PTSC modules under real working conditions remains poorly understood. In this study, we investigated the module stability by connecting individual PTSCs. Evident hot spot effect caused by partial light occlusion was firstly observed in PTSCs. Moreover, the module exhibited a rapid output power degradation under maximum power point tracking (MPPT) condition, but it spontaneously recovers to initial output power within one minute in dark environment. Impressively, the module stability improves significantly after several MPPT cycles. These findings provide critical insights into the stability mechanisms of PTSC modules and offer practical guidelines for improving the performance in future applications.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"654-658"},"PeriodicalIF":2.3,"publicationDate":"2025-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Impact of Externally Induced Uniaxial Stress on the Electrical Performance of the Junctionless Nanowire Field-Effect Transistors","authors":"Nitish Kumar;Ankur Gupta;Pushpapraj Singh","doi":"10.1109/TDMR.2025.3581604","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3581604","url":null,"abstract":"The uniaxial tensile mechanical stress (MS) is induced up to 1.4 GPa on the channel of the twin junctionless nanowire (JL-NW) gate-all-around (GAA) field-effect transistors (FETs) using a four-point bending technique. The variation of the electrical parameters is measured before and during induced MS to analyze the performance. The ON-state current, carrier mobility, threshold voltage, and subthreshold swing are directly proportional to the induced MS due to the reduced energy band gap and intervalley scattering effect. The reduced subthreshold swing indicates low power consumption and better switching ability, whereas the higher OFF-state current leads to slightly increased standby power consumption, representing a trade-off for low-power logic applications. In addition, the change of drain current shows highly piezoresistive sensing ability in nanoelectromechanical sensor applications. Thus, this study demonstrates the importance of mechanical stress engineering for performance improvement in non-planar nanowire devices, piezoresistive sensing applications, and device reliability.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"677-683"},"PeriodicalIF":2.3,"publicationDate":"2025-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145027951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Andrea Baroni;Eduardo Pérez;Keerthi Dorai Swamy Reddy;Stefan Pechmann;Christian Wenger;Daniele Ielmini;Cristian Zambelli
{"title":"Enhancing RRAM Reliability: Exploring the Effects of Al Doping on HfO2-Based Devices","authors":"Andrea Baroni;Eduardo Pérez;Keerthi Dorai Swamy Reddy;Stefan Pechmann;Christian Wenger;Daniele Ielmini;Cristian Zambelli","doi":"10.1109/TDMR.2025.3581061","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3581061","url":null,"abstract":"This study provides a comprehensive evaluation of RRAM devices based on HfO2 and Al-doped HfO2 insulators, focusing on critical performance metrics, including Forming yield, Post-Programming Stability (PPS), Fast Drift, Endurance, and Retention at elevated temperatures (<inline-formula> <tex-math>$125~{^{circ }}$ </tex-math></inline-formula>C). Aluminum doping significantly enhances device reliability and stability, improving Forming yield, reducing current drift during programming and Retention tests, and minimizing variability during Endurance cycling. While Al5%:HfO2 achieves most of the observed benefits compared to pure HfO2, Al7%:HfO2 offers incremental advantages for scenarios requiring extreme reliability. These findings position Al-doped HfO2 devices as a promising solution for RRAM-based systems in memory and neuromorphic computing, highlighting the potential trade-off between performance gains and increased fabrication complexity. This work underlines the importance of material engineering for optimizing RRAM devices in application-specific contexts.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"379-387"},"PeriodicalIF":2.3,"publicationDate":"2025-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145051068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of 2T DRAM Cell With Surrounding Poly-Si Capacitor for Enhanced Retention and Mitigated Coupling Effect","authors":"Seonghwan Kong;Wonbo Shim","doi":"10.1109/TDMR.2025.3578692","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3578692","url":null,"abstract":"Two-transistors-zero-capacitor (2T0C) DRAM-based processing-in-memory (PIM) system experiences retention degradation and capacitive coupling effects because of its volatile characteristics and capacitorless structure. These challenges result in degraded reliability and significant energy consumption due to frequent refresh operations. In this work, we propose a cell structure with surrounding polycrystalline silicon capacitor (poly-Cap.) to enhance the storage node capacitance of the vertical-transistor on gate (VTG) DRAM cell introduced in our previous work. The poly-Cap. improves the retention characteristics and mitigates the capacitive coupling effects while maintaining its unit cell area. We modeled the VTG DRAM cell with the poly-Cap. and analyzed its device characteristics using TCAD simulations. Additionally, we evaluated the inference accuracy of the 2T DRAM-based PIM system using a customized simulation framework. We confirmed that the poly-Cap. increased the storage node capacitance by 31.9%, improved the retention characteristics by 83.3% and reduced the capacitive coupling effects by 52.4% during the write ‘1’ operation and 27.3% during the read ‘1’ operation.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 3","pages":"460-464"},"PeriodicalIF":2.3,"publicationDate":"2025-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145050817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Exploration of the exciting world of multifunctional oxide-based electronic devices: from material to system-level applications","authors":"","doi":"10.1109/TDMR.2025.3575823","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3575823","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 2","pages":"355-356"},"PeriodicalIF":2.5,"publicationDate":"2025-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11028628","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144243809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Announcing an IEEE/Optica Publishing Group Journal of Lightwave Technology Special Issue on: OFS-29","authors":"","doi":"10.1109/TDMR.2025.3575821","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3575821","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 2","pages":"354-354"},"PeriodicalIF":2.5,"publicationDate":"2025-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11028133","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144243811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Call for Nominations for Editor-in-Chief IEEE Electron Device Letters","authors":"","doi":"10.1109/TDMR.2025.3558657","DOIUrl":"https://doi.org/10.1109/TDMR.2025.3558657","url":null,"abstract":"","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"25 2","pages":"353-353"},"PeriodicalIF":2.5,"publicationDate":"2025-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11028627","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144243657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}