2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual最新文献_第2页

History Dependent Recovery of NBTI under Alternating DC and AC Stress 交变直流和交流胁迫下NBTI恢复的历史依赖性

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369572

H. Kufluoglu, C. Prasad, M. Agostinelli

引用次数: 2

Impact of Gate Tunneling Leakage on Performances of Phase Locked Loop Circuit in Nanoscale CMOS Technology 纳米级CMOS技术中栅隧穿泄漏对锁相环路性能的影响

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.370002

Jung-Sheng Chen, M. Ker

引用次数: 2

Basic Research for the Air Force of the 21st Century 21世纪空军基础研究

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369857

Thomas Hussey

引用次数: 0

Picosecond Timing Analysis in Integrated Circuits with Pulsed Laser Stimulation 脉冲激光刺激下集成电路的皮秒定时分析

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369945

A. Douin, V. Pouget, D. Lewis, P. Fouillat, P. Perdu

引用次数: 5

New Degradation Phenomena of Stress-Induced Voiding Inside via in Copper Interconnects 铜互连孔内应力诱导空化的新退化现象

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369989

H. Matsuyama, M. Shiozu, T. Kouno, T. Suzuki, H. Ehara, S. Otsuka, T. Hosoda, T. Nakamura, Y. Mizushima, M. Miyajima, K. Shono

引用次数: 10

Extended Reliability Study of High Density PZT Capacitors: Intrinsic Lifetime Determination and Wafer Level Screening Strategy 高密度PZT电容器扩展可靠性研究:固有寿命确定和晶圆级筛选策略

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369929

E. Bouyssou, G. Guégan, S. Bruyère, R. Pezzani, L. Berneux, J. Rebrasse, C. Anceau, C. Nopper

{"title":"Extended Reliability Study of High Density PZT Capacitors: Intrinsic Lifetime Determination and Wafer Level Screening Strategy","authors":"E. Bouyssou, G. Guégan, S. Bruyère, R. Pezzani, L. Berneux, J. Rebrasse, C. Anceau, C. Nopper","doi":"10.1109/RELPHY.2007.369929","DOIUrl":"https://doi.org/10.1109/RELPHY.2007.369929","url":null,"abstract":"The processing of high-k PZT material enables to reach specific capacitance values up to 30 nF/mm2. This paper proposed an extended reliability study of integrated PZT capacitors, including both intrinsic and extrinsic issues. The intrinsic lifetime projections are given by a complete reliability model, developed from a basic time-dependent dielectric breakdown characterization. Several intrinsic failure mechanisms were identified depending on the applied voltage stress level. Hence, the authors adopted a testing methodology based on cumulated voltage and temperature accelerations, which enables to emulate only the relevant failure mechanism for lifetime extrapolation. Concerning the early failure rate issue, the authors developed an efficient wafer level screening procedure which enables to get rid of the whole extrinsic population. This screening methodology consists in applying an in-line bias pulse to all capacitors after the last etching step. The main difficulty to overcome for the industrial implementation of this procedure was the detection of defective devices. This issue was solved through the detection of negative dV/dt discharging peaks during the bias pulse application. Finally both intrinsic lifetime results and early failure rate obtained by this screening methodology turns out to be satisfying enough for technology qualification and industrialization.","PeriodicalId":433104,"journal":{"name":"2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130687856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

ESD Testing of Aluminum and Copper Vertical Parallel plate (VPP) Capacitor Structures 铝和铜垂直平行板(VPP)电容器结构的ESD测试

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369963

S. Voldman, E. Gebreselasie, Z. He

引用次数: 1

Single Event Upsets in a 130 nm Hardened Latch Design Due to Charge Sharing 基于电荷共享的130纳米硬化锁存设计中的单事件干扰

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369908

O. Amusan, A. L. Steinberg, A. Witulski, B. Bhuva, J. Black, M. Baze, L. Massengill

{"title":"Single Event Upsets in a 130 nm Hardened Latch Design Due to Charge Sharing","authors":"O. Amusan, A. L. Steinberg, A. Witulski, B. Bhuva, J. Black, M. Baze, L. Massengill","doi":"10.1109/RELPHY.2007.369908","DOIUrl":"https://doi.org/10.1109/RELPHY.2007.369908","url":null,"abstract":"Critical charge to represent a logic HIGH is steadily decreasing with decreasing technology feature size. Many methods have been developed to increase critical charge requirement for storage elements, thereby reducing the soft error rates. Design-based approaches have been proposed that use four storage nodes instead of two nodes to retain data. Such designs are considered single event upset (SEU) immune at low energy ion hits for all practical purposes because a single ion hit at a storage node does not cause an upset. However, such designs are vulnerable to ion hits that result in multiple nodes collecting charges. For deep sub-micron technologies, the proximity of circuit nodes results in charge collection at multiple nodes when a single ion strikes a node. Researchers first observed the effect of such charge sharing in SRAM designs. In this paper, circuit and 3D technology computer aided design (TCAD) mixed-mode simulations are used to characterize charge sharing between sensitive pairs of devices and the resulting upsets in a hardened storage cell. The simulation results were verified with experimental data showing upsets due to charge sharing in a hardened cell when exposed to low energy ions","PeriodicalId":433104,"journal":{"name":"2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115851310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 65

A New "Multi-step" Power-law TDDB Lifetime Model and Boron Penetration Effect on TDDB of Ultra Thin oxide 一种新的“多步”幂律TDDB寿命模型及硼对超薄氧化物TDDB的穿透效应

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369957

P. Liao, C. Chen, C.J. Wang, K. Wu

引用次数: 0

Themixed-Mode Damage Spectrum of Sige HBTs Sige HBTs的混合模损伤谱

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual Pub Date : 2007-04-01 DOI: 10.1109/RELPHY.2007.369953

P. Cheng, Chendong Zhu, J. Cressler, A. Joseph

引用次数: 5