{"title":"A new method for comparing migration abilities of conductor systems based on conventional electroanalytical techniques","authors":"G. Harsányi, G. Inzelt","doi":"10.1109/ECTC.2000.853443","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853443","url":null,"abstract":"There are various metallization types, pure metals as well as alloys, showing very different abilities for migration. Their comparison is available only through empirical way. There are two main possibilities for getting information or comparison about the migration behavior of a sample: the water drop test and accelerated climatic tests. The results are generally uncertain showing large spreading and can only be interpreted with difficulties. Further problems are the undefined conditions and many subjective things with the Water Drop (WD) test while rather long periods of tests and special test chambers are necessary to perform climatic tests. A third method has been developed and will be presented in the paper for testing metallization systems based on a powerful technique; this is the very well known cyclic voltammetry used in the electroanalytical chemistry. The results indicate an effective method for making quick comparison between metallization systems in connection with their migration abilities.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129386255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chul-Won Ju, Sang-Pok Lee, Young-Min Lee, Seak-Bong Hyun, Seong-Su Park, Min-Kyu Song
{"title":"Embedded passive components in MCM-D for RF applications","authors":"Chul-Won Ju, Sang-Pok Lee, Young-Min Lee, Seak-Bong Hyun, Seong-Su Park, Min-Kyu Song","doi":"10.1109/ECTC.2000.853150","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853150","url":null,"abstract":"The increasing demand for high density packaging was the driving forces to the development of MCM-D technology. Most of these development efforts have been focused on high performance digital circuits. However, recently there is a great need for mixed mode circuits with a combination of digital, analog and microwave devices. Mixed mode modules often have a large number of passive components that are connected to a small number of active devices. Integration of passive components into the high density MCM substrate becomes desirable to further reduce cost, size, and weight of electronic systems while improving their performance and reliability. So, we developed the embedded passive components (including resistors, capacitors, inductors) for RF module in MCM-D substrate. This paper will describe the manufacturing process of MCM-D substrate, the method for integrating passive components in MCM-D substrate and electrical performance test.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131311402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Joshi, J. Sircar, A. Bar-Cohen, S. Bhavnani, J. Barnes
{"title":"Distance learning in thermal design of electronic systems - the IEEE/NSF project","authors":"Y. Joshi, J. Sircar, A. Bar-Cohen, S. Bhavnani, J. Barnes","doi":"10.1109/ECTC.2000.853341","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853341","url":null,"abstract":"A three-year collaborative effort initiated by three institutions has resulted in a new paradigm for distance learning in rapidly evolving technology areas, such as electronics packaging. From the start, the team emphasized the use of multi-media technology for creating and disseminating internet delivered, re-configurable, shared modular educational materials. These modules could be used in a stand-alone fashion for re-training, or embedded in existing courses in various curricula. Using these modules, the first offering of a one semester graduate course on thermal design of electronic systems was made during Spring 1999. This included participants not only from the three original universities, but also from the industry and other universities. This course was taught once a week for three hours, live over the internet. In addition, course materials asynchronously available on the web included Power Point slides of the notes, streaming video, computational codes and virtual laboratory tours. During the second offering of this course during Spring 2000, a number of additional features have been implemented, including expanded participation and greater collaboration. This paper will concentrate on the lessons learned from teaching the second generation of this course. Ongoing efforts involving module standardization will also be described.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128736247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Warpage studies of HDI test vehicles during various thermal profiling","authors":"G. Petriccione, Charles Ume","doi":"10.1109/ECTC.2000.853438","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853438","url":null,"abstract":"New techniques and technologies involved in the miniaturization of printed wiring board (PWB) fabrication are rapidly emerging. The quality, performance, and reliability of surface mount assemblies built on these next-generation boards will depend on many factors, including thermally induced warpage. Therefore, quantitative warpage measurement is critical in new PWB assembly design evaluation, and determining overall thermal performance characteristics. Using an automated infrared reflow oven simulation system, the warpage of six bare high density interconnect (HDI) samples is measured under two different heating profiles. Out-of-plane surface displacement is measured with a non-contact shadow moire technique and resolution enhancement method called phase-stepping. The two types of samples evaluated were built for the purpose of warpage study, where physical data could be used to validate finite element analysis (FEA) results. The warpage results obtained with the two thermal profiles will be presented.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128737712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Novel die attach films having high reliability performance for lead-free solder and CSP","authors":"S. Takeda, T. Masuko","doi":"10.1109/ECTC.2000.853432","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853432","url":null,"abstract":"Properties and reliability of two kinds of die attach films were studied. A die attach film DF-335-7 developed for high temperature reflow soldering due to a lead(Pb)-free solder, was composed of a modified polyimide base resin, a thermosetting resin, and a silver filler. Relationships among peel strength, work of adhesion, water absorption, package crack resistance, and composition of the film were discussed. Another die attach film DF-400 for new advanced packages such as a Fine-pitch Ball Grid Array (F-BGA) and a Chip Scale Package (CSP) was studied. Relationships among chip warpage, attaching temperature, glass transition temperature (Tg) of a base resin, and package crack resistance were discussed.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128833582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A measurement and simulation study of transmission lines on microstrip and stacked-pair structure for high speed signals","authors":"Y. Odate, T. Usami, K. Otsuka, T. Suga","doi":"10.1109/ECTC.2000.853208","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853208","url":null,"abstract":"In high frequency transmission, crosstalk toward neighbor lines increases because of the strong behavior of electric and magnetic field. In this paper, we present a new transmission structure especially focused on the bus between CPU and memory for high frequency range. And we confirm the superiority of new structure through measurement and simulation study in terms of electromagnetic field analysis.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115795386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Review of the reliability of advanced component packaging technologies","authors":"P. Nemeth, Z. Illyefalvi-Vitéz, G. Harsányi","doi":"10.1109/ECTC.2000.853430","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853430","url":null,"abstract":"Reliability is one of the most important questions in any applications both on package (component), and on board (system) level. In particular, the reliability requirements of automotive under-hood applications are very severe and diverse. Lifetime of an under-hood electronic unit must be 10...20 years, the operation temperature range is -40...150/spl deg/C (depending on the application zone) and the acceleration is 4 g...100 g. The reliability data presented by different component manufacturers were analyzed, compared and evaluated. From the point of view of the analyzed component types, ball grid array packages (BGAs) are in the focus, since they are being considered as replacements for peripheral-leaded plastic quad flat packs (PQFPs) for most future electronics applications. In general, BGAs include packages made of plastic (PBGA) or ceramic (CBGA) materials, using conventional or tape automated bonding (TAB) construction (TBGA), and of very small dimensions called chip scale packages (CSPs). A multichip module packaged in appropriate format is also considered BGA.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"363 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115960556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Bond, G. Shtengel, P. Singh, Y. Akulova, C. Reynolds
{"title":"High speed packaged electroabsorption modulators for optical communications","authors":"A. Bond, G. Shtengel, P. Singh, Y. Akulova, C. Reynolds","doi":"10.1109/ECTC.2000.853198","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853198","url":null,"abstract":"High speed packaged electroabsorption modulators are fabricated from the InGaAsP material system with integrated mode converters. The packaged devices exhibit 43 GHz modulation bandwidth, -10 dB electrical return loss, and 10 dB extinction for 2Vp-p. Device design and package considerations for high speed devices is presented.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116027694","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Direct generation of Spice compatible passive reduced order models of ground/power planes","authors":"M. J. Choi, Kyu-Pyung Hwang, N. Cangellaris","doi":"10.1109/ECTC.2000.853247","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853247","url":null,"abstract":"The continuing growth of complexity in modern ULSI design, combined with sub-nanosecond switching speeds, have made necessary the careful assessment of issues such as interplane capacitance, decoupling capacitor selection and placement, as well as resonance effects in the power distribution network. Toward this objective, various research groups have proposed modeling methodologies based on a two-dimensional approximation of Maxwell's equations in the space between adjacent power/ground planes. In this paper, a solid power/ground plane pair is discretized by a distributed RLCG circuit. The resulting discrete model is used in conjunction with the passive reduced-order modeling algorithm PRIMA for the generation of low order, multi-port macromodels to be incorporated in non-linear circuit simulators such as SPICE. Through a rigorous mathematical and physical investigation of the distributed electromagnetic effects between power/ground planes, reliable estimates for the order of the reduced model are derived for accurate multiport modeling over a given frequency bandwidth. The numerical results show that the generated rules provide the robustness required for the numerical generation of guaranteed-passive, reduced order electrical models for power/ground plane structures of optimum complexity.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"107 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120942334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A manufacturing perspective of wafer level CSP","authors":"L. Nguyen, N. Kelkar, H. Takiar","doi":"10.1109/ECTC.2000.853126","DOIUrl":"https://doi.org/10.1109/ECTC.2000.853126","url":null,"abstract":"The micro SMD package, a wafer level Chip Scale Package (CSP), was successfully introduced by National Semiconductor about two years ago for portable wireless applications where weight, thin form factor, and board space savings are as critical as increased functionality. The package provides a matrix interconnect layout at 0.5 mm pitch, does not require underfill, and leverages standard surface mount assembly techniques. This paper will evaluate the pros and cons of packaging this wafer level CSP against a conventional leaded package and a traditional CSP.","PeriodicalId":410140,"journal":{"name":"2000 Proceedings. 50th Electronic Components and Technology Conference (Cat. No.00CH37070)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126602413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}