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Piezoelectric micropump for lab-on-a-chip applications 用于芯片实验室应用的压电微泵
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-19 DOI: 10.1109/ICM.2009.5418596
J. G. Rocha, V. Cardoso, V. Correia, S. Mendez, G. Minas
{"title":"Piezoelectric micropump for lab-on-a-chip applications","authors":"J. G. Rocha, V. Cardoso, V. Correia, S. Mendez, G. Minas","doi":"10.1109/ICM.2009.5418596","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418596","url":null,"abstract":"This paper describes an on-chip pumping system and the correspondent driving circuit. The system can be used in lab-on-a-chip applications for pumping the fluids in the microchannels. The device is constituted by two chips placed together: a CMOS chip with the electronics and a glass chip, with the microchannels and the pumping system. This pumping system, wich is the main subject of the article is based on piezoelectric polymer actuators.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127629666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Optimising physical wires usage in mesh-based multi-FPGA systems using partition swapping 使用分区交换优化基于网格的多fpga系统中的物理导线使用
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-19 DOI: 10.1109/ICM.2009.5418637
A. Maache, J. Reeve, Mark Zwolinski
{"title":"Optimising physical wires usage in mesh-based multi-FPGA systems using partition swapping","authors":"A. Maache, J. Reeve, Mark Zwolinski","doi":"10.1109/ICM.2009.5418637","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418637","url":null,"abstract":"Recently, FPGAs have been integrated into HPC clusters in order to boost computational performance while reducing power consumption. However, performance and effective logic utilisation is usually limited by the number of inter-device pins and most importantly the interconnection architecture. Mesh interconnection in particular suffers from the pin-limitation problem. The concept of Virtual Wires has been proposed to reduce the impact of this problem by using time-multiplexed physical wires. This paper demonstrates a simple yet effective technique to further reduce the number of the physical wires required by the Virtual Wires and the Mesh architectures by an average of 18% over the original routing algorithms. This technique can be equally applied to exploit the topological properties of any mesh-based architecture.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129615020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Modeling of self-initialized electrostatic energy scavenger 自初始化静电能量清除器建模
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418595
Inas Raafat, H. Ragaie, Dmitri Galayko
{"title":"Modeling of self-initialized electrostatic energy scavenger","authors":"Inas Raafat, H. Ragaie, Dmitri Galayko","doi":"10.1109/ICM.2009.5418595","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418595","url":null,"abstract":"With the expanding market of low-power wireless sensor nodes that would normally be deployed in great numbers, sometimes in harsh environment, the access to these nodes is problematic. This makes the process of maintaining and changing the batteries quite difficult and costly. The idea to convert vibration energy; existing in our everyday environment and especially in industrial plants, into electrical energy became very attractive. One promising technique, that is CMOS compatible, is based on MEMS electrostatic vibration energy harvesting. This technique suffers form a shortcoming problem which is the need for an initial charging voltage of the structure variable capacitor. In this context, the purpose of this work is to design a piezoelectric voltage generator integrable into the electrostatic structure to provide the necessary initial voltage. In that way the system will be self initialized and autonomous. This paper will focus on CMOS compatible piezoelectric transducers for initial DC voltage generation and their behavioral modeling using ELDO / VHDL-AMS.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"520 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123061995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
FPGA implementation of a reconfigurable Viterbi decoder for WiMAX receiver 用于WiMAX接收机的可重构维特比解码器的FPGA实现
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418636
S. Shaker, S. El-Ramly, K. Shehata
{"title":"FPGA implementation of a reconfigurable Viterbi decoder for WiMAX receiver","authors":"S. Shaker, S. El-Ramly, K. Shehata","doi":"10.1109/ICM.2009.5418636","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418636","url":null,"abstract":"Field Programmable Gate Array technology (FPGA) is a highly configurable option for implementing many sophisticated signal processing tasks in Software Defined Radios (SDRs). Those types of radios are realized using highly configurable hardware platforms. Convolutional codes are used in every robust digital communication system and Viterbi algorithm is employed in wireless communications to decode the convolutional codes. Such decoders are complex and dissipate large amount of power. In this paper, a low power-reconfigurable Viterbi decoder for WiMAX receiver is described using a VHDL code for FPGA implementation. The proposed design is implemented on Xilinx Virtex-II Pro, XC2vpx30 FPGA using the FPGA Advantage Pro package provided by Mentor Graphics and ISE 10.1 by Xilinx.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"17 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122597255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
Aspect-based ABV for SystemC transaction level models SystemC事务级模型的基于方面的ABV
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418623
Meriam Kallel, Younes Lahbib, R. Tourki, A. Baganne
{"title":"Aspect-based ABV for SystemC transaction level models","authors":"Meriam Kallel, Younes Lahbib, R. Tourki, A. Baganne","doi":"10.1109/ICM.2009.5418623","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418623","url":null,"abstract":"Transaction level modeling (TLM) is increasingly being adopted to describe hardware designs at high abstraction levels. This paper proposes a framework that targets the assertion-based verification (ABV) of SystemC transaction level models during simulation. Aspect-oriented (AO) mechanisms are exploited to write temporal properties that fit TLM requirements. No modifications are needed in the design's SystemC code. Functional as well as performance properties are addressed. We demonstrate the effectiveness of our approach on TLM 2.0 standard compliant models.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129614208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Analysis of multi-layer ARROW 多层ARROW分析
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418628
S. Nacer, A. Aissat
{"title":"Analysis of multi-layer ARROW","authors":"S. Nacer, A. Aissat","doi":"10.1109/ICM.2009.5418628","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418628","url":null,"abstract":"In this work, we analyze the characteristics of the multi-layer ARROW waveguides. The method used is the transfer matrix method. The dependence of the effective index and the attenuation on the waveguide parameters such as number of cladding, contrast of cladding indices, width of the core, and the wavelength has been investigated. The results of our simulation show that the higher the contrast of cladding indices and the lower is the number of cladding necessary to have low loss operation.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129210628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Implementation of large size multipliers using ternary adders and higher order compressors 使用三元加法器和高阶压缩器实现大尺寸乘法器
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418675
Shuli Gao, D. Al-Khalili, N. Chabini
{"title":"Implementation of large size multipliers using ternary adders and higher order compressors","authors":"Shuli Gao, D. Al-Khalili, N. Chabini","doi":"10.1109/ICM.2009.5418675","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418675","url":null,"abstract":"Recent FPGA architectures facilitate the efficient mapping of high order compressors to implement multi-operand additions. This feature can be used to improve the performance and area utilization of large size multipliers. In this paper we present an improved design approach utilizing ternary adders and Generalized Parallel Compressors, GPCs, for the addition of the partial products. Multipliers of different sizes ranging from 80 bits to 170 bits were implemented on Altera's Stratix III devices. The results of our proposed scheme are compared to the standard ripple-adder-based multipliers. On average, a delay reduction of 17.7% and area saving of 56.53% were achieved when using ternary adders. Using the GPCs with one level ternary adder, the average delay reduction is 18.7% and the average area saving is 24.1%.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116335858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Hexagonal shaped microcantilever based IR imaging sensor 六角形微悬臂红外成像传感器
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418605
Hesham H. Gaber, H. Elsemary, H.H. Ali
{"title":"Hexagonal shaped microcantilever based IR imaging sensor","authors":"Hesham H. Gaber, H. Elsemary, H.H. Ali","doi":"10.1109/ICM.2009.5418605","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418605","url":null,"abstract":"This paper is an analytical study for a new design microcantilever based IR (Infra Red) sensor. Using hexagonal structure increases energy absorbed, and is useful for the imaging processing after that due to using hexagonal coordinates. Fill factor is also one of the most properties improved in this design. Bimaterial microcantilever is used as a mechanical sensor which is deflected based on the mismatch between the two thermal expansions for the materials used. Maximizing deflection is analyzed and computed NETDTF (Noise Equivalent Temperature Difference) calculated as low as 2.5 mK which proof the good performance of the proposed sensor.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131058744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Handsheet for full-custom circuit design 全定制电路设计手册
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418678
Natalia A. Fernandez-Garcia, V. Brea, D. Cabello
{"title":"Handsheet for full-custom circuit design","authors":"Natalia A. Fernandez-Garcia, V. Brea, D. Cabello","doi":"10.1109/ICM.2009.5418678","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418678","url":null,"abstract":"This paper addresses a transistor level design for manufacturing methodology. Design efforts are devoted to robustness against process variations. Temperature and voltage tolerances should also be tackled for mass production. A structured design methodology contemplating issues like intuitive design and Monte-Carlo simulations is proposed. As an illustrative example, the methodology is applied to the design of a cellular nonlinear network cell in UMC 130 nm CMOS technology.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"140 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132896900","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Leakage Power Analysis attacks: Well-defined procedure and first experimental results 泄漏功率分析攻击:定义良好的程序和第一个实验结果
2009 International Conference on Microelectronics - ICM Pub Date : 2009-12-01 DOI: 10.1109/ICM.2009.5418592
M. Alioto, L. Giancane, G. Scotti, A. Trifiletti
{"title":"Leakage Power Analysis attacks: Well-defined procedure and first experimental results","authors":"M. Alioto, L. Giancane, G. Scotti, A. Trifiletti","doi":"10.1109/ICM.2009.5418592","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418592","url":null,"abstract":"In this paper, attacks aiming at recovering the secret key of a cryptographic core from measurements of its static (leakage) power are presented. These attacks exploit the dependence of the leakage current of CMOS Integrated Circuits (ICs) on their inputs (e.g., the secret key of a cryptographic circuit). For this reason, these novel attacks are referred to as Leakage Power Analysis (LPA) attacks in this paper. Since the leakage power increases much faster than the dynamic power at each new technology node, LPA attacks are shown to be a serious threat to information security of cryptographic circuits in sub-100 nm technologies. For the first time in the literature, a well-defined procedure to perform LPA attacks is presented. Advantages and measurement issues are also analyzed in comparison with traditional Power Analysis attacks based on dynamic power measurements. An experimental attack to a register is finally performed for the first time.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132734207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
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