{"title":"全定制电路设计手册","authors":"Natalia A. Fernandez-Garcia, V. Brea, D. Cabello","doi":"10.1109/ICM.2009.5418678","DOIUrl":null,"url":null,"abstract":"This paper addresses a transistor level design for manufacturing methodology. Design efforts are devoted to robustness against process variations. Temperature and voltage tolerances should also be tackled for mass production. A structured design methodology contemplating issues like intuitive design and Monte-Carlo simulations is proposed. As an illustrative example, the methodology is applied to the design of a cellular nonlinear network cell in UMC 130 nm CMOS technology.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"140 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Handsheet for full-custom circuit design\",\"authors\":\"Natalia A. Fernandez-Garcia, V. Brea, D. Cabello\",\"doi\":\"10.1109/ICM.2009.5418678\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper addresses a transistor level design for manufacturing methodology. Design efforts are devoted to robustness against process variations. Temperature and voltage tolerances should also be tackled for mass production. A structured design methodology contemplating issues like intuitive design and Monte-Carlo simulations is proposed. As an illustrative example, the methodology is applied to the design of a cellular nonlinear network cell in UMC 130 nm CMOS technology.\",\"PeriodicalId\":391668,\"journal\":{\"name\":\"2009 International Conference on Microelectronics - ICM\",\"volume\":\"140 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Conference on Microelectronics - ICM\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2009.5418678\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Microelectronics - ICM","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2009.5418678","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper addresses a transistor level design for manufacturing methodology. Design efforts are devoted to robustness against process variations. Temperature and voltage tolerances should also be tackled for mass production. A structured design methodology contemplating issues like intuitive design and Monte-Carlo simulations is proposed. As an illustrative example, the methodology is applied to the design of a cellular nonlinear network cell in UMC 130 nm CMOS technology.