{"title":"MOSFET with additional lateral trench gate","authors":"B. Ramadout, G. Lu, J. Carrere","doi":"10.1109/ICM.2009.5418609","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418609","url":null,"abstract":"We present a device structure consisting of a MOS transistor with additional lateral trench gate (LTG). It can be seen as two transistors with surface and lateral gates respectively sharing the same source and drain. The device can be implemented and fabricated in a standard CMOS process with few extra process steps for integrating polysilicon-filled trenches. Current-voltage characterization of the device shows double-threshold-voltage behavior of the lateral-gate transistor, which may be due to non-homogenous doping distributions. Due to combined effects of channel-width modulation and shallow-body depletion, the threshold voltage of each transistor can be tuned to a certain extent by the other transistor's gate voltage. Such effects are more pronounced when reducing gate width.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"176 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133181991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multiphase Sinusoidal Oscillators using Current Feedback Operational Amplifiers","authors":"G. Skotis, C. Psychalinos","doi":"10.1109/ICM.2009.5418579","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418579","url":null,"abstract":"A voltage-mode multiphase oscillator topology is introduced in this paper. It is realized by employing Current Feedback Operational Amplifiers and only grounded passive elements. Compared with the corresponding already known topology, the offered benefits are the capability for obtaining both odd and even number of phases without modifying the core of the topology and the absence of employment of the CFOA parasitic poles. The behaviour of the proposed topology has been evaluated through experimental results, by utilizing the AD844 discrete CFOA component.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133258684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An FPGA implementation of the NTRUEncrypt cryptosystem","authors":"A. A. Kamal, A. Youssef","doi":"10.1109/ICM.2009.5418649","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418649","url":null,"abstract":"The NTRU encryption algorithm, also known as NTRUEncrypt, is a parameterized family of lattice-based public key cryptosystems. Both the encryption and decryption operations in NTRU are based on simple polynomial multiplication which makes it very fast compared to other alternatives such as RSA, and elliptic-curve-based systems. Recently, the NTRU system has been accepted to the IEEE P1363 standards under the specifications for lattice-based public-key cryptography (IEEE P1363.1). In this paper, we investigate several hardware implementation options for the NTRU encryption algorithm. In particular, by utilizing the statistical properties of the distance between the non-zero elements in the polynomials involved in the encryption and decryption operations, we present an architecture that offers different area-speed trade-off and analyze its performance. A prototype for the proposed design is implemented using the virtex-E xcv1600e-8-fg860 FPGA chip.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"601 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123178963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"“Green Luxury” — technology and solutions for energy management","authors":"B. Visweswaran, Anoop Kulkarni","doi":"10.1109/ICM.2009.5418672","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418672","url":null,"abstract":"The mounting pressures on conventional energy sources and recent findings on climate change have brought attention to not just how we use energy but also how we manage it and ultimately how we conserve it. Rapid urbanization and increased infrastructure development have posed challenges on how to improve the quality of life without compromising the environment. Cities today consume 75% of the world's energy and worldwide consumer electronics represent 15% of the household power consumption. Intelligent and automated solutions are required to enable the consumers to not only measure how energy is used but also to monitor and manage it. Studies have shown that the display of real time information on energy consumption and carbon dioxide emissions results in a reduction of nearly 15%. This paper details how open and Internet enabled technologies and solutions can enable industries, commercial buildings and private homes to monitor and mange their resources. By integrating with other sensors and systems the solution enables end users to consume responsibly and manage effectively.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"197 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115654395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Chopper stabilized integrated Hall effect magnetometer","authors":"C. Ouffoue, L. Hébrard, V. Frick, C. Kern","doi":"10.1109/ICM.2009.5418590","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418590","url":null,"abstract":"This paper presents a low noise, low offset and wide dynamic range Hall effect magnetometer integrated in a 0.35 ¿m CMOS technology. It features a spinning-current operated Hall device and a chopper stabilization, which has been unconventionally implemented using high-pass filters. The magnetometer exhibits 350 ¿T offset, can measure magnetic fields up to 1T with 10 ¿T resolution over a 3.6 kHz bandwidth.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124393099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"MoVES — A framework for modelling and verifying embedded systems","authors":"A. Brekling, M. R. Hansen, J. Madsen","doi":"10.1109/ICM.2009.5418667","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418667","url":null,"abstract":"The MoVES framework is being developed to assist in the early phases of embedded systems design. A system is modelled as an application running on an execution platform. The application is modelled through the individual tasks, and the execution platform is modelled through the processing elements, including the operating systems, and their interconnections. The tasks and processing elements are characterized by their real-time properties. The framework can be used to conduct schedulability analysis and has the potential to reason about different types of resource usage such as memory usage and power consumption. A simple specification language for embedded systems and a verification backend are presented. The framework has a modular, parameterized structure supporting easy extension and adaptation of the specification language as well as of the verification backend. We show, using a number of small examples, how MoVES can be used to model and analyze embedded systems.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115055397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparison and silicon realization of custom designed MEMS biomedical pressure sensors","authors":"Y. Wahab, A. Zayegh, R. Begg","doi":"10.1109/ICM.2009.5418594","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418594","url":null,"abstract":"In our modern living era, pressure sensing is one of the most performed measurements to enhance the quality of life. The more advanced technology such as silicon based Micro-electro-mechanical Systems (MEMS) technology is usually explored due to its competitive cost and proven performance. We have explored and implemented the design of MEMS micro pressure sensor on silicon for biomedical applications. Due to the challenging application requirements, many newer designs have been investigated in addition to the previously reported work. Comparisons of the performance of the new designs are herein presented and discussed according to the design stages. A highly proven technology offered by Infineon Technologies SensorNor AS is used in this research and the final implementations are also discussed. The final device is successfully implemented on silicon. In this paper, the extended new unreported design work and the fabrication result are discussed. Future works are also discussed in the final section.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116399734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of switched capacitor biquad filter with quality factor tunability","authors":"Khalid A. Al-Badawy, E. Soliman, S. Mahmoud","doi":"10.1109/ICM.2009.5418621","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418621","url":null,"abstract":"A high selectivity switched capacitor bandpass filter is introduced in this paper which is derived from Fleischer and Laker switched capacitor biquad [1]. High quality factors are obtained by means of a proposed Q-factor tuning technique that is applied by changing the effective sampling frequency of the clock signals of a positive feedback switched capacitor branch. The center frequency is 17.4 KHz and Q-factor ranges from 0.53–27.04. Spice simulations are provided for the filters. Active blocks are used to realize switched capacitor filters where an Operational Amplifier is used for simulation, The op-amp used in the design stage is a two-stage compensated op-amp where a 0.25µm transistor model is used with a supply voltage Vdd and Vss of ±2.5V respectively","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129573274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Dependence of Differential flip-flops performance on clock slope and relaxation of clock network design","authors":"M. Alioto, Elio Consoli, G. Palumbo","doi":"10.1109/ICM.2009.5418677","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418677","url":null,"abstract":"In this paper, the impact of the clock slope on the performance of high-speed Differential flip-flops in a 65-nm CMOS technology is discussed. Usually the local network that distributes the clock signal to the flip-flops is designed to guarantee a steep clock waveform in order to not compromise the flip-flops performance. We show that, even doubling the clock slope (or more) with respect to typical FOI -h F03 values, the impact on the Differential flip-flops speed is negligible. Correspondently, their energy dissipation increases but this drawback is balanced by the lower consumption resulting from the local clock distribution buffers, whose size/number can be reduced. Therefore, a tradeoff arises and, on the whole, the optimum clock slope can be different from the usual FOI -h F03 assumption. This result allows to relax the local (domain) clock network design, thereby reducing the energy consumption associated with the distribution of the clock within a domain. Results with a 65-nm technology show that the resulting energy saving can be up to 60 %.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125085580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ivan Berettat, V. Rana, David Atienza Alonso, M. Santambrogio, D. Sciuto
{"title":"Run-Time mapping for dynamically-added applications in reconfigurable embedded systems","authors":"Ivan Berettat, V. Rana, David Atienza Alonso, M. Santambrogio, D. Sciuto","doi":"10.1109/ICM.2009.5418666","DOIUrl":"https://doi.org/10.1109/ICM.2009.5418666","url":null,"abstract":"The increasing popularity of multi-core System-on-Chip platforms introduces new challenges, both in terms of hardware platforms and design methodologies. Dynamic reconfiguration can be exploited to increase the flexibility of the system and to implement multiple applications, since it is possible to easily switch between them by reconfiguring part of the device at run-time. Additionally, new applications may be included in the system after the design time synthesis has been completed. This paper addresses the problem of mapping new applications on the device area at run-time, by reusing existing components of the system. We propose an heuristic technique that is able to determine how the new application should be mapped in a short time and, thanks to the reuse policy, to immediately deploy the solution on the device. The proposed algorithm also takes into consideration two conflicting performance metrics, in order to generate a good quality result.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"726 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122999352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}