{"title":"附加横向沟槽栅极的MOSFET","authors":"B. Ramadout, G. Lu, J. Carrere","doi":"10.1109/ICM.2009.5418609","DOIUrl":null,"url":null,"abstract":"We present a device structure consisting of a MOS transistor with additional lateral trench gate (LTG). It can be seen as two transistors with surface and lateral gates respectively sharing the same source and drain. The device can be implemented and fabricated in a standard CMOS process with few extra process steps for integrating polysilicon-filled trenches. Current-voltage characterization of the device shows double-threshold-voltage behavior of the lateral-gate transistor, which may be due to non-homogenous doping distributions. Due to combined effects of channel-width modulation and shallow-body depletion, the threshold voltage of each transistor can be tuned to a certain extent by the other transistor's gate voltage. Such effects are more pronounced when reducing gate width.","PeriodicalId":391668,"journal":{"name":"2009 International Conference on Microelectronics - ICM","volume":"176 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"MOSFET with additional lateral trench gate\",\"authors\":\"B. Ramadout, G. Lu, J. Carrere\",\"doi\":\"10.1109/ICM.2009.5418609\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a device structure consisting of a MOS transistor with additional lateral trench gate (LTG). It can be seen as two transistors with surface and lateral gates respectively sharing the same source and drain. The device can be implemented and fabricated in a standard CMOS process with few extra process steps for integrating polysilicon-filled trenches. Current-voltage characterization of the device shows double-threshold-voltage behavior of the lateral-gate transistor, which may be due to non-homogenous doping distributions. Due to combined effects of channel-width modulation and shallow-body depletion, the threshold voltage of each transistor can be tuned to a certain extent by the other transistor's gate voltage. Such effects are more pronounced when reducing gate width.\",\"PeriodicalId\":391668,\"journal\":{\"name\":\"2009 International Conference on Microelectronics - ICM\",\"volume\":\"176 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Conference on Microelectronics - ICM\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICM.2009.5418609\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Microelectronics - ICM","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM.2009.5418609","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We present a device structure consisting of a MOS transistor with additional lateral trench gate (LTG). It can be seen as two transistors with surface and lateral gates respectively sharing the same source and drain. The device can be implemented and fabricated in a standard CMOS process with few extra process steps for integrating polysilicon-filled trenches. Current-voltage characterization of the device shows double-threshold-voltage behavior of the lateral-gate transistor, which may be due to non-homogenous doping distributions. Due to combined effects of channel-width modulation and shallow-body depletion, the threshold voltage of each transistor can be tuned to a certain extent by the other transistor's gate voltage. Such effects are more pronounced when reducing gate width.