R. Mozhaev, M. Cherniak, A. Pechenkin, A. Ulanova, A. Nikiforov
{"title":"Comparative Assessment of Digital and UHF Optoelectronic Transceivers Radiation Hardness","authors":"R. Mozhaev, M. Cherniak, A. Pechenkin, A. Ulanova, A. Nikiforov","doi":"10.1109/MIEL.2019.8889626","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889626","url":null,"abstract":"A method for radiation hardness evaluation of digital and microwave transmitting-receiving optoelectronic modules is presented. The technical aspects of parameters monitoring during exposure are described. The most vulnerable components of optoelectronic modules are identified.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132567241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Spassov, A. Paskaleva, V. Davidovic, S. Djoric-Veljkovic, S. Stankovic, N. Stojadinovic, T. Ivanov, T. Stanchev
{"title":"Impact of γ Radiation on Charge Trapping Properties of Nanolaminated HfO2/Al2O3 ALD Stacks","authors":"D. Spassov, A. Paskaleva, V. Davidovic, S. Djoric-Veljkovic, S. Stankovic, N. Stojadinovic, T. Ivanov, T. Stanchev","doi":"10.1109/MIEL.2019.8889600","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889600","url":null,"abstract":"The effect of γ radiation on the charge trapping and oxide properties of MIS capacitors with nanolaminated RfO2/Ah03 dielectrics are presented. The irradiation with dose of 1 and 10 Mrad generates electron traps thereby substantially enhancing the memory windows of stacks. γ radiation increases the positive oxide charge of the structures, but the effect depends also on the thermal treatment of the stacks. The used doses do not deteriorate the density of interface states, leakage currents and retention characteristics.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131115739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Copyright","authors":"","doi":"10.1109/miel.2019.8889569","DOIUrl":"https://doi.org/10.1109/miel.2019.8889569","url":null,"abstract":"","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131676767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Parallel Adaptive LMS FIR Filter Realized in CMOS Technology","authors":"R. Dlugosz, T. Talaśka, T. Nikolic, G. Nikolic","doi":"10.1109/MIEL.2019.8889595","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889595","url":null,"abstract":"The paper presents an adaptive Finite Impulse Response (FIR) filter implemented at the transistor level in the CMOS technology. The filter is based on the LMS (least mean squares) adaptation algorithm. We applied several solutions that allows for simplifications of the hardware structure of the filter. One of them is to eliminate the division operation, replacing it with the bit-shifting operation. Parallel operation of the blocks representing particular filter coefficients allows to achieve operating speeds that are independent on the filter order. Main components of the filter were designed in the CMOS 130 nm technology and verified by means of laboratory tests, while selected structures of the overall filter have been examined by means of transistor-level simulations.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125472479","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-Fidelity Predictive Simulation of High Power Devices and Modules at the Rim of the Safe-Operating Area and Beyond","authors":"Gerhard Wachutka","doi":"10.1109/MIEL.2019.8889604","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889604","url":null,"abstract":"The development of high-performance power devices is increasingly supported by predictive computer simulations on the basis of well-calibrated physical device models. Today's challenge is to make virtual experiments and tests on the computer, which are qualitatively reliable and quantitatively accurate even for device structures that have never been built before, and under operational conditions that very rarely occur as long as the device is kept within the “safe operating area (SOA)”. What we are interested in is to explore the rim of the SOA and even to go beyond it in order to study failure and, eventually, destruction mechanisms with a view to improving robustness and reliability of the devices with respect to a customer-defined “mission profile”. In particular in the field of high power electronics, predictive high-fidelity computer simulations of “virtual desctruction” are of utmost importance. We will illustrate today's state of the art with reference to selected real-life examples.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133109396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A programmable current-mode digital-to-analog converter with correction of nonlinearity of input-output characteristics","authors":"J. Dalecki, R. Dlugosz, T. Talaśka, G. Fischer","doi":"10.1109/MIEL.2019.8889647","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889647","url":null,"abstract":"The paper presents a concept of a programmable digital-to-analog converter (DAC) with the correction mechanism of a non-linearity of the input-output characteristics. The motivation behind the research presented in this work is an earlier project of a 10-bits two stage current mode DAC, whose basic block is a two-stage multi-output current mirror with binary weighted branches. The laboratory measurements of this converter were carried out, during which a certain non-linearity of the input-output characteristics was observed. Particular branches of the DAC theoretically should offer gains of the input trimming of 1, 2, 4, 8, …, 512, respectively. In fact, in several sections this gain differs by several percent from the assumed values. The result of these observations is the proposition of a programmable correction mechanism, suitable for current mode converters.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131837725","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On the ESD Protection and Non-Fatal ESD Strike on Nano CMOS Devices","authors":"H. Wong, S. Dong, Z. Chen","doi":"10.1109/MIEL.2019.8889652","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889652","url":null,"abstract":"Electrostatic discharge (ESD) has been one of the major causes for the failure of electronic equipment and components and have attracted quite significant research efforts in minimizing the losses induced. Much tougher challenge comes up in the nano CMOS era. For the device technology itself, the aggressive scaling on gate length, high-k replacement of gate oxide, and the reduction of supply voltage have made the design window of ESD protection device be ever narrower. New ESD protection devices are yet to be developed for the 10 nm technology and beyond. For system and application level, the mobile devices we used right now are much vulnerable as they are more frequent to be exposed to various sources of ESD and power surges. Fatal ESD strike protection is always the primary design specification and should have been mostly fulfilled. The effects of non-fatal ESD strike has not attracted much attention yet. Recent experiment showed that the non-fatal ESD strikes at gate and drain can cause significant charge trapping and trap generation. It resulted in the device characteristic degradation and hence some reliability issues of CMOS circuits and the MOS-based ESD clamps. This review addresses all these issues in detail.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"59 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131858108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SAR ADC Architecture with Fully Passive Noise Shaping","authors":"Dmitry Osipov, A. Gusev, V. Shumikhin, S. Paul","doi":"10.1109/MIEL.2019.8889572","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889572","url":null,"abstract":"A new fully passive noise-shaping architecture for successive approximation register (SAR) analog-to-digital converters (ADCs) was proposed. A first-order noise transfer function (NTF) with zero located nearly at one can be achieved. The additional pole increases the efficiency of noise shaping to further 3 dB. So, the use of higher over sampling ratios (OSR) and increased effective number of bits (ENOB) is possible. The architecture was applied to the design of a 9.8-bit ENOB SAR ADC in a 65 nm complementary metal-oxide semiconductor (CMOS) of United Microelectronics Corporation (UMC) with OSR equal to 10. A 6-bit capacitive DAC was used. The proposed architecture provides 3.8 additional bits in ENOB. The equalent input bandwitdth is equal to 200 kHz with the sampling rate equal to 4 MS/s.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"304 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123123961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Sotskov, N. Usachev, V. Elesin, A. G. Kuznetsov, K. Amburkin, G. Chukov, M. I. Titova, N. M. Zidkov
{"title":"D-mode pHEMT 0.5 um Process Characterization to Wide-Band LNA Design","authors":"D. Sotskov, N. Usachev, V. Elesin, A. G. Kuznetsov, K. Amburkin, G. Chukov, M. I. Titova, N. M. Zidkov","doi":"10.1109/MIEL.2019.8889636","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889636","url":null,"abstract":"Results of domestic D-mode pHEMT 0.5 µm process characterization obtained during the design and testing of the single power supply wide-band low noise amplifier (LNA) are present. The simulation and test results demonstrate that designed cascode LNA has operating frequency range up to 3.5 GHz, power gain above 15 dB, noise figure below 2.2 dB, output linearity above than 17 dBm and power consumption less than 325 mW. Potential immunity of LNA to total ionizing dose and destructive single event effects exceed 300 krad and 60 MeV·cm2/mg respectively.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114730043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Živanović, S. Veljković, M. Živković, M. Pejovic
{"title":"Reliability of Various Type of Gas-filled Surge Arresters Under DC Discharge","authors":"E. Živanović, S. Veljković, M. Živković, M. Pejovic","doi":"10.1109/MIEL.2019.8889580","DOIUrl":"https://doi.org/10.1109/MIEL.2019.8889580","url":null,"abstract":"The delay response of Littelfuse gas-filled surge arresters was determined using the time delay method. It is a qualitative method, which can give neither the number densities of ions nor neutral active states in the glow and afterglow, but it can be used for qualitative observation of ions and neutral active states decay in the afterglow to such low concentrations where other methods cannot be applied. It has also enabled the estimation of recombination and de-excitation times of the mentioned particles due to their recombination on the tube walls, electrodes and in gas. Experimental data of mean values of breakdown voltage of these components were obtained for voltage increase rates from 1 to 10 Vs-1 analysed with discretized dynamic method presented in this paper. Besides, an influence of overvoltage values on the dependence of electrical breakdown voltage vs. relaxation time was also been investigated.","PeriodicalId":391606,"journal":{"name":"2019 IEEE 31st International Conference on Microelectronics (MIEL)","volume":"349 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122173269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}