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2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting最新文献

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Varactorless, tuneable LC-VCO for microwave frequencies in a 0.25 μm SiGe BiCMOS technology 无变容体，可调谐LC-VCO微波频率在0.25 μm SiGe BiCMOS技术
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351838
H. Veenstra, E. van der Heijden
{"title":"Varactorless, tuneable LC-VCO for microwave frequencies in a 0.25 μm SiGe BiCMOS technology","authors":"H. Veenstra, E. van der Heijden","doi":"10.1109/BIPOL.2007.4351838","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351838","url":null,"abstract":"Many LC-VCOs use a cross-coupled differential pair as active negative resistance. The cross-coupled differential pair realizes un damping for frequencies up to fcross. An active negative resistance can also be realized based on a capacitively loaded emitter follower. Such a topology enables higher oscillation frequencies, and is therefore more suited for microwave frequencies. Moreover, by realizing the capacitive load from the input capacitance of a second, resistively loaded emitter follower, the negative resistance and output signal buffering functions can be combined. The varactor typically dominates the losses of the LC-tank at microwave frequencies. This paper demonstrates an LC-VCO based on a capacitively loaded emitter follower, with frequency tuning realized via the collector-base capacitance of the first emitter followers connected to the inductor. No additional varactor is required. The oscillator, implemented in a 0.25μm SiGe:C BiCMOS technology, achieves a measured frequency tuning range from 53.2 to 57.6 GHz and a phase noise of -100 dBc/Hzat 1 MHz from the carrier.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117123867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
ESD Protection of Fast Transient Pins in Bipolar Processes 双极工艺中快速瞬态引脚的ESD保护
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351874
V. Vashchenko, V. Kuznetsov, P. Hopper
{"title":"ESD Protection of Fast Transient Pins in Bipolar Processes","authors":"V. Vashchenko, V. Kuznetsov, P. Hopper","doi":"10.1109/BIPOL.2007.4351874","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351874","url":null,"abstract":"The results of a comparative analysis between transient triggered and voltage referenced ESD power clamps are presented. Different architectures with both external and the internal breakdown voltage reference techniques are studied leading towards both optimal snapback characteristics and a small footprint ESD protection solution for power management applications. The physical mechanism of ESD snapback operation is discussed in terms of the classical understanding of avalanche-injection conductivity modulation in a bipolar transistor. The advantage of an internal Zener diode solution over both an enhanced Zener and a BVCER clamp is demonstrated.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127081770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Monolithic 5-Bit SiGe BiCMOS Receiver for X-Band Phased-Array Radar Systems 用于x波段相控阵雷达系统的单片5位SiGe BiCMOS接收机
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351862
J. Comeau, M. Morton, W. Kuo, T. Thrivikraman, J. Andrews, C. Grens, J. Cressler, J. Papapolymerou, M. Mitchell
{"title":"A Monolithic 5-Bit SiGe BiCMOS Receiver for X-Band Phased-Array Radar Systems","authors":"J. Comeau, M. Morton, W. Kuo, T. Thrivikraman, J. Andrews, C. Grens, J. Cressler, J. Papapolymerou, M. Mitchell","doi":"10.1109/BIPOL.2007.4351862","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351862","url":null,"abstract":"This work presents a 5-bit receiver for X-band phased-array radar applications based on a commercially-available silicon-germanium (SiGe) BiCMOS technology. The receiver achieves a gain of 11 dB, an operational bandwidth from 8.0 to 10.7 GHz, an average noise figure of 4.1 dB, and an input-referred third-order intercept point (IIP3) of-13 dBm, while only dissipating 33 mW of power. The receiver also provides 32 distinct phase states from 0 to 360deg, with an rms phase error < 9deg. This level of circuit performance and integration capability demonstrates the benefits of SiGe BiCMOS technology for emerging radar applications, making it an excellent candidate for integrated X-band phased-array radar transmit/receive modules.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127251642","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
A Single-ended 79 GHz Radar Receiver in SiGe Technology 基于SiGe技术的79ghz单端雷达接收机
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351873
Li Wang, S. Glisic, J. Borngraeber, W. Winkler, C. Scheytt
{"title":"A Single-ended 79 GHz Radar Receiver in SiGe Technology","authors":"Li Wang, S. Glisic, J. Borngraeber, W. Winkler, C. Scheytt","doi":"10.1109/BIPOL.2007.4351873","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351873","url":null,"abstract":"For the first time a single-ended 79 GHz receiver in SiGe technology is reported in this paper for automotive radar application. The receiver consists of a single-ended cascode LNA, a single-ended RF double-balanced down-conversion micromixer, and a Colpitts VCO. The LNA and mixer present 21.7 dB and 7 dB gain at 79 GHz respectively, and VCO oscillates from 79 to 82 GHz. The measurement for the whole receiver at 79 GHz shows 20-26 dB gain in the linear region with stable IF output signal. The input P1dB of the receiver is -35 dBm.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117025582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Development of a self-aligned pnp HBT for a complementary thin-SOI SiGeC BiCMOS technology 用于互补薄soi SiGeC BiCMOS技术的自对准pnp HBT的开发
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351833
J. Duvernay, F. Brossard, G. Borot, L. Boissonnet, B. Vandelle, L. Rubaldo, F. Deleglise, G. Avenier, P. Chevalier, B. Rauber, D. Dutartre, A. Chantre
{"title":"Development of a self-aligned pnp HBT for a complementary thin-SOI SiGeC BiCMOS technology","authors":"J. Duvernay, F. Brossard, G. Borot, L. Boissonnet, B. Vandelle, L. Rubaldo, F. Deleglise, G. Avenier, P. Chevalier, B. Rauber, D. Dutartre, A. Chantre","doi":"10.1109/BIPOL.2007.4351833","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351833","url":null,"abstract":"This paper describes the development of a thin-SOI pnp SiGeC HBT using a self-aligned selective epitaxy emitter/base architecture. Static and dynamic device characteristics are presented, and first results from a full 130 nm thin-SOI complementary SiGeC BiCMOS technology are reported.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124027684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
High speed junction diodes in BiCMOS technologies 高速结二极管在BiCMOS技术
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351843
S. Pendharkar, J. Trogolo
{"title":"High speed junction diodes in BiCMOS technologies","authors":"S. Pendharkar, J. Trogolo","doi":"10.1109/BIPOL.2007.4351843","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351843","url":null,"abstract":"Implementation of a very fast high voltage junction diode in a BiCMOS technology is discussed. It is shown that the diode is more than two orders of magnitude faster with almost two orders of magnitude lower stored charge compared to a conventional junction diode in a BiCMOS technology. Using the suggested diode structure, one can achieve the required isolation to the substrate as well as obtain the switching performance close to that of an ideal Schottky diode. It is also possible to integrate this fast switching diode structure into a LDMOS device to help improve the parasitic performance of the LDMOS and increase its switching speed.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131508072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
On the Frequency Limits of SiGe HBTs for TeraHertz Applications 太赫兹应用中SiGe hbt的频率限制
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351830
Jiahui Yuan, R. Krithivasan, J. Cressler, M. Khater, D. Ahlgren, A. Joseph
{"title":"On the Frequency Limits of SiGe HBTs for TeraHertz Applications","authors":"Jiahui Yuan, R. Krithivasan, J. Cressler, M. Khater, D. Ahlgren, A. Joseph","doi":"10.1109/BIPOL.2007.4351830","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351830","url":null,"abstract":"We report record f<sub>max</sub> for a silicon-based transistor, and the first combined set of f<sub>1</sub>+ f<sub>max</sub> above one-terahertz for silicon-germanium heterojunction bipolar transistors (SiGe HBTs). Peak f<sub>max</sub> of 618 GHz and f<sub>rfloor</sub> of 463 GHz at 4.5 K (chuck temperature) were measured for a scaled 0.12 times 2.5 mum-SiGe HBT (343 / 309 GHz at 300 K), at a breakdown voltage BV<sub>CEO</sub> of 1.62 V (1.70 at 300 K), yielding a record f<sub>T</sub> x BV<sub>CEO</sub> product of 750 GHz-V (510 GHz-V at 300 K). An examination of base transport in these devices at low temperatures suggests non-equilibrium effects are operative.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"57 34","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120839578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
High robustness PNP-based structure for the ESD protection of high voltage I/Os in an advanced smart power technology 基于pnp的高鲁棒性结构用于高电压I/ o的ESD保护，是一种先进的智能电源技术
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351875
Philippe Renaud, A. Gendron, M. Bafleur, N. Nolhier
{"title":"High robustness PNP-based structure for the ESD protection of high voltage I/Os in an advanced smart power technology","authors":"Philippe Renaud, A. Gendron, M. Bafleur, N. Nolhier","doi":"10.1109/BIPOL.2007.4351875","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351875","url":null,"abstract":"A new device dedicated to the ESD protection of high voltage I/Os is presented. In addition to the use of specific design guidelines, the concept consists in coupling an open-base lateral PNP with a vertical avalanche diode within the same structure to obtain a non-snapback behavior together with very good Ron capabilities (~1Omega). The protection of high voltage I/Os with a narrow ESD design window ranging from 80 V to 100 V can be implemented in a reduced surface of 151*140 mum2, which represents a state-of-the-art breakthrough.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128391064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A 5.2GHz Low Power Transceiver RFIC for WLAN Applications 一种用于WLAN应用的5.2GHz低功耗收发器RFIC
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351826
Yin Shi, F. Dai, Jun Yan, Xueqing Hu, Qiming Xu, Hua Xu, Xuelian Zhang
{"title":"A 5.2GHz Low Power Transceiver RFIC for WLAN Applications","authors":"Yin Shi, F. Dai, Jun Yan, Xueqing Hu, Qiming Xu, Hua Xu, Xuelian Zhang","doi":"10.1109/BIPOL.2007.4351826","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351826","url":null,"abstract":"This paper presents a low-power single chip WLAN 802.11a transceiver RFIC for personal communication terminal applications. The 5.2 GHz transceiver RFIC is implemented in a 0.5 mum SiGe technology with 16 mm2 die size. It consumes 110/130 mA in receive/transmit mode under a 3.3V supply. The receiver path shows a 6.4 dB noise figure and a -20dBm IIP3 under a maximal 67 dB gain. The transmitter path IIP3 is measured as 29.7 dBm. The LC-tuned VCO has a tuning range from 4.08 GHz to 4.7 GHz and the measured phase noise is - 112 dBc/Hz @ 1MHz offset.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130411297","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Direct-Conversion Mixer with a DC-offset Cancellation for WLAN 用于WLAN的具有直流偏置抵消的直接转换混频器
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351828
Qiming Xu, Xueqing Hu, Y. Jan, Yin Shi, F. F. Dai, R. Jaeger
{"title":"A Direct-Conversion Mixer with a DC-offset Cancellation for WLAN","authors":"Qiming Xu, Xueqing Hu, Y. Jan, Yin Shi, F. F. Dai, R. Jaeger","doi":"10.1109/BIPOL.2007.4351828","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351828","url":null,"abstract":"This paper presents a 5GHz double-balanced mixer with DC-offset cancellation circuit for direct-conversion receiver compliant with IEEE 802.11a wireless LAN standard. The analog feedback loop is used, to eliminate the DC-offset at the output of the double-balanced mixer. The test results show that the mixer with DC-offset cancellation circuit has voltage conversion gain of 9.5dB at 5.15GHz, noise figure of 13.5dB, IIP3 of 7.6 dBm, 1.73mV DC-offset voltage and 67mW power with 3.3-V power supply. The DC-offset cancellation circuit has less than 0.1mm2 additional area and 0.3mW added power dissipation. The direct conversion WLAN receiver has been implemented in a 0.35mum SiGe BiCMOS technology.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"162 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127554364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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