ESD Protection of Fast Transient Pins in Bipolar Processes

Abstract

The results of a comparative analysis between transient triggered and voltage referenced ESD power clamps are presented. Different architectures with both external and the internal breakdown voltage reference techniques are studied leading towards both optimal snapback characteristics and a small footprint ESD protection solution for power management applications. The physical mechanism of ESD snapback operation is discussed in terms of the classical understanding of avalanche-injection conductivity modulation in a bipolar transistor. The advantage of an internal Zener diode solution over both an enhanced Zener and a BVCER clamp is demonstrated.