Jonggook Kim, A. Sadovnikov, Tianbing Chen, J. Babcock
{"title":"Safe Operating Area from Self-Heating, Impact Ionization, and Hot Carrier Reliability for a SiGe HBT on SOI","authors":"Jonggook Kim, A. Sadovnikov, Tianbing Chen, J. Babcock","doi":"10.1109/BIPOL.2007.4351876","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351876","url":null,"abstract":"A unified electro-thermal safe operating area (SOA) expression is proposed in this paper to evaluate self heating, impact ionization, and hot carrier (HC) degradation effects simultaneously in a full range of bipolar transistor operation. This SOA is demonstrated by experiments for a SiGe hetero-junction bipolar transistor (HBT) fabricated on silicon on insulator (SOI) by extracting principle parameters from discrete transistors and current mirrors. Also, time dependent reliability tests have been fulfilled for several meaningful bias points within this SOA at the fixed VBE and VCE. Avalanche induced HC injection was another important factor to restrict device performance. Finally, the modified electro-thermal SOA by HC reliability is suggested here.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133061974","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Chevalier, N. Zerounian, B. Barbalat, F. Aniel, A. Chantre
{"title":"On the use of cryogenic measurements to investigate the potential of Si/SiGe:C HBTs for terahertz operation","authors":"P. Chevalier, N. Zerounian, B. Barbalat, F. Aniel, A. Chantre","doi":"10.1109/BIPOL.2007.4351831","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351831","url":null,"abstract":"The transit times analysis, at room and cryogenic temperatures, of SiGe HBTs featuring various ftau/fmax trade-offs is performed. It allows to identify the principal development axes to reach half-terahertz at 300 K, a frequency already obtained at 40 K.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114648792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Malladi, M. McPartlin, A. Joseph, H. Lafontaine, M. Doherty
{"title":"Large Signal Modeling of High Efficiency SiGe HBTs for Power Amplifier Applications","authors":"R. Malladi, M. McPartlin, A. Joseph, H. Lafontaine, M. Doherty","doi":"10.1109/BIPOL.2007.4351839","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351839","url":null,"abstract":"Large-signal compact modeling of SiGe HBTs integrated into a new IBM BICMOS technology geared towards high-efficiency power amplifiers is described. The technology exhibits a record 73% PAE at 5.75 GHz in class AB operation. A scalable HiCUM model (high current model) is developed to accurately model the DC, small-signal and large-signal characteristics. Results of DC, fT characteristics, output power, PAE and AM-PM performance of the device are discussed in detail.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116025533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Kurachi, Y. Murata, S. Ishikawa, N. Itoh, K. Yonemura
{"title":"A 4-GHz band ultra-wideband voltage controlled oscillator IC using 0.35 μm SiGe BiCMOS technology","authors":"S. Kurachi, Y. Murata, S. Ishikawa, N. Itoh, K. Yonemura","doi":"10.1109/BIPOL.2007.4351827","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351827","url":null,"abstract":"This paper presents an ultra-wideband voltage controlled oscillator (VCO) IC using 0.3S μm SiGe BiCMOS technology. The VCO IC exhibits an oscillation frequency from 2.67 to 4.37 GHz. To realize the wideband tuning range, a novel resonant circuit is proposed. The novel resonant circuit consists of three NMOS varactor pairs, p-n diodes, two spiral inductors and a control circuit which sequentially applies a control voltage to the NMOS varactor pairs and p-n diode pairs. The novel resonant circuit allows the VCO IC to have the wideband tuning range with a single analog control voltage. The dc current consumption of the VCO is 5.8 mA at a collector voltage of 4.0 V. The VCO has a phase noise of -111 dBc/Hz at 1 MHz offset at an oscillation frequency of 4.37 GHz.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133675021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. van Noort, C. Detcheverry, A. Rodriguez, R. Pijper
{"title":"On-chip mm-Wave passives","authors":"W. van Noort, C. Detcheverry, A. Rodriguez, R. Pijper","doi":"10.1109/BIPOL.2007.4351861","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351861","url":null,"abstract":"Waveguides and varactors are evaluated with their application in integrated SiGe mm-wave circuits in mind. Coplanar waveguides and hyperabrupt varactors show adequate performance when carefully designed. Waveguides with ~2 dB/cm RF loss at 10 GHz and varactors with a tuning-range Qmin product of 0.7 THz are demonstrated.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131686489","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Finn, Jiahui Yuan, R. Krithivasan, L. Najafizadeh, P. Cheng, J. Cressler
{"title":"A 10 Mbps SiGe BiCMOS Transceiver for Operation Down to Cryogenic Temperatures","authors":"S. Finn, Jiahui Yuan, R. Krithivasan, L. Najafizadeh, P. Cheng, J. Cressler","doi":"10.1109/BIPOL.2007.4351849","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351849","url":null,"abstract":"A 10 Mbps wire-line transceiver compatible with the RS-485 standard is implemented in SiGe BiCMOS technology. This general purpose SiGe bus transceiver represents the first demonstration of a wide temperature range (-180degC to +27degC) enabled, radiation tolerant as built, wire-line transceiver, and is intended for use in emerging space system avionics platforms. Robust functionality within specifications from -180degC to +27degC is demonstrated.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131838112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Notice of Violation of IEEE Publication PrinciplesA BiCMOS SiGe Direct-Conversion DBS Satellite TV Tuner with on-chip ADCs for SiP Integration with a CMOS Demodulator-on-Host","authors":"A. Maxim","doi":"10.1109/BIPOL.2007.4351845","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351845","url":null,"abstract":"Partitioning a DBS satellite TV receiver in a front-end RF-to-digital tuner that includes the baseband ADC converters and a digital-only demodulator-on-host resulted in a low cost and a good isolation between the analog front-end and the digital back-end, having no interface components and noise coupling issues. The two ICs were assembled together achieving a system-in-package. A direct-conversion BiCMOS tuner benefits from the low 1/f noise and high ftau bipolar transistors resulting in a lower noise figure in comparison with CMOS implementations. The on-chip LNA noise was reduced by using a noise cancellation technique that rejects the noise contribution of the input devices, eliminating the need for an external LNA. The DC offset cancellation loop capacitors were integrated on-chip by combining multiple offset loops with a Miller capacitance multiplication. The die area was significantly reduced by replacing the multi-oscillator solution used at present with a single high frequency Colpitts oscillator followed by a ratiometric frequency divider that generates the local oscillator signals for the entire satellite TV L-band.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125408565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jun-tao Hu, P. Zampardi, C. Cismaru, K. Kwok, Y. Yang
{"title":"Physics-Based Scalable Modeling of GaAs HBTs","authors":"Jun-tao Hu, P. Zampardi, C. Cismaru, K. Kwok, Y. Yang","doi":"10.1109/BIPOL.2007.4351863","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351863","url":null,"abstract":"While physics-based scalable models are commonplace in the Si industry, there has been little work on applying these techniques to III-V HBTs. The diversification of performance requirements for various handset standards presents an excellent opportunity for GaAs to adopt and even improve upon this modeling methodology. In this work we will present the implementation and application of physics-based scalable models to materials from a GaAs HBT manufacturing line. The application of this methodology has greatly reduced the time, effort, and expense of generating HBT models for multiple material structures using a given technology generation.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121770697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Large Signal RF Characterization of Bipolar Transistors","authors":"M. Tutt, E. Johnson","doi":"10.1109/BIPOL.2007.4351841","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351841","url":null,"abstract":"Conventional performance figures of merit are reviewed and recent new figures of merit due to the proliferation of digital communications are presented. Basic load pull systems are described and sample results are presented. The role of large signal characterization in model validation is given.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130002436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SOI-based devices and technologies for High Voltage ICs","authors":"F. Udrea","doi":"10.1109/BIPOL.2007.4351842","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351842","url":null,"abstract":"This paper reviews the current status Silicon-On-Insulator (SOI) devices and technologies for high voltage integrated circuits (HVICs) and discusses new trends in the field. The paper focuses on novel SOI-based RESURF concepts such as superjunction, linearly graded profile or SOI membrane technology. Due to its intrinsic isolation properties, the SOI is the ideal substrate for bipolar MOS switches such as the LIGBT. In fact, the only LIGBT products on the market are fabricated using Dielectric Isolation (type of SOI) and SOI technology. The paper finishes with an overview of the fierce fight of technology survival in terms of specific Ron vs breakdown voltage. Here the SOI competes with quasi-vertical DMOS technologies and advanced bulk BCD technologies.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114339403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}