发布求助
文献互助 智能选刊 最新文献

2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting最新文献

筛选
英文 中文
17GHz RF Front-Ends for Low-Power Wireless Sensor Networks 用于低功耗无线传感器网络的17GHz射频前端
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351860
Wanghua Wu, M. Sanduleanu, Xia Li, J. Long
{"title":"17GHz RF Front-Ends for Low-Power Wireless Sensor Networks","authors":"Wanghua Wu, M. Sanduleanu, Xia Li, J. Long","doi":"10.1109/BIPOL.2007.4351860","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351860","url":null,"abstract":"A 17 GHz low power radio front-end is presented. Low-power operation is based on minimization of energy/bit, the design metric for low-power radios. Increasing the data rate while reducing the receiver turn-on time is proposed as a method of improving energy efficiency. Circuit design of prototype receiver and transmitter front ends for a 17 GHz ultra low-power radio are presented and discussed. The power gain of the LNA is 12 dB with a minimum noise figure of 3.25 dB. Conversion gain of the RF chain is 30 dB at DC, the measured IIP3 of the Rx chain is -26.3 dBm whereas the maximum saturated output power of the PA is about 5 dBm. The total, measured power consumption is 17.5 mW (@2.5 supply) in the received","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132951299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Distribution of the Collector Resistance of Planar Bipolar Transistors: Impact on Small Signal Characteristics and Compact Modeling 平面双极晶体管集电极电阻分布:对小信号特性的影响及紧凑模型
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351865
R. van der Toorn, J. Dohmen, O. Hubert
{"title":"Distribution of the Collector Resistance of Planar Bipolar Transistors: Impact on Small Signal Characteristics and Compact Modeling","authors":"R. van der Toorn, J. Dohmen, O. Hubert","doi":"10.1109/BIPOL.2007.4351865","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351865","url":null,"abstract":"We investigate the relevance of the distribution of the extrinsic collector resistance of a bipolar transistor with respect to its small signal characteristics. We show that this distribution is relevant to the admittance parameters in general and to the cut-off frequency and unilateral power gain in particular. We present analytical results for ;y-parameters in terms of elements of the small-signal equivalent circuit of the Mextram compact model, extended with distributed extrinsic collector resistance. Hence, our results are relevant to compact modeling, bipolar device technology development and characterization and to design of RF power amplifiers.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122115961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A 12-bit 65 MS/s pipeline A/D converter in 0.18 μm SiGe BiCMOS 基于0.18 μm SiGe BiCMOS的12位65ms /s流水线A/D转换器
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351837
S. Devarajan, R. Gutmann, K. Rose
{"title":"A 12-bit 65 MS/s pipeline A/D converter in 0.18 μm SiGe BiCMOS","authors":"S. Devarajan, R. Gutmann, K. Rose","doi":"10.1109/BIPOL.2007.4351837","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351837","url":null,"abstract":"This work discusses the benefits of a SiGe BiCMOS implementation over a CMOS implementation for pipeline A/Ds. While various circuit blocks in a pipeline A/D can benefit from the higher transconductance (gm), higher unity gain frequency (fT) and lower noise of SiGe HBTs, this work focuses on the most critical block in a pipeline A/D, the operational transconductance amplifier (OTA). An OTA employing an all NMOS pre-amplifier followed by a cascoded SiGe HBT stage with actively cascoded PMOS loads is designed. A prototype 12-bit pipeline A/D achieves a measured SNDR of 62.6 dB and a SFDR of 73.4 dB at 65 MS/s with a power dissipation of 325 mW and operates from dual 1.8 V and 3.3 V supplies.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121042767","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
PNP SiGe: C HBT Optimization in a Low-Cost CBiCMOS Process PNP SiGe:低成本CBiCMOS工艺中的C - HBT优化
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351832
D. Knoll, B. Heinemann, Y. Yamamoto, H. Wulf, D. Schmidt
{"title":"PNP SiGe: C HBT Optimization in a Low-Cost CBiCMOS Process","authors":"D. Knoll, B. Heinemann, Y. Yamamoto, H. Wulf, D. Schmidt","doi":"10.1109/BIPOL.2007.4351832","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351832","url":null,"abstract":"We present results of pnp transistor optimization in a low-cost, complementary SiGe:C BiCMOS process. A particular goal was to provide well matched parameters of pnp and npn devices. A high pnp transistor current gain of 100 was reached without compromising the LF noise behavior. Two types of pnp transistors are presented showing BVCEO values of 3.3 V and 4.5 V, respectively, a (BVCEO times fT) product in excess of 260 VGHz, fmax values up to 105 GHz, and a minimum noise figure of 1.2 dB at 5 GHz. These pnp data fit well to the data of the medium-voltage npn transistors also available in this CBiCMOS process.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"2020 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115858962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A 77 GHz SiGe Mixer Circuit with LO Active Frequency Multiplier for Automotive Radar 一种用于汽车雷达的带LO有源倍频器的77ghz SiGe混频器电路
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351870
M. Hartmann, C. Wagner, K. Seemann, H. Jager, R. Weigel
{"title":"A 77 GHz SiGe Mixer Circuit with LO Active Frequency Multiplier for Automotive Radar","authors":"M. Hartmann, C. Wagner, K. Seemann, H. Jager, R. Weigel","doi":"10.1109/BIPOL.2007.4351870","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351870","url":null,"abstract":"This paper presents a direct-conversion mixer for 77 GHz integrated with an active 4times LO frequency multiplier. The circuit was manufactured using a SiGe technology. Noise figure, conversion gain, linearity and s-parameter measurement results will be shown.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114707670","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Electrically Programmable Fuses for Analog and Mixed Signal Applications in Silicon Germanium BiCMOS Technologies 用于硅锗BiCMOS技术中模拟和混合信号应用的可编程熔断器
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351878
E. Gebreselasie, S. Voldman, Z. He, D. Coolbaugh, R. Rassel, T. Kirihata, A. Paganini, C. Cox, S. Mongeon, S. St. Onge, J. Dunn, R. Halbach, J. Lukaitis
{"title":"Electrically Programmable Fuses for Analog and Mixed Signal Applications in Silicon Germanium BiCMOS Technologies","authors":"E. Gebreselasie, S. Voldman, Z. He, D. Coolbaugh, R. Rassel, T. Kirihata, A. Paganini, C. Cox, S. Mongeon, S. St. Onge, J. Dunn, R. Halbach, J. Lukaitis","doi":"10.1109/BIPOL.2007.4351878","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351878","url":null,"abstract":"An electrically programmable fuse, known as \"eFUSE,\" is used to provide passive device trimming and circuitry fine tuning for analog and mixed signal applications in silicon germanium BiCMOS technologies will be discussed. Timing analysis, pre-and post-programming electrical characterization, and electro-migration failure analysis will be presented.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121532838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
High-Voltage Low-Power Analog Design in Nanometer CMOS Technologies 纳米CMOS技术中的高压低功耗模拟设计
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351857
S. Bazarjani, L. Mathe, D. Yuan, J. Hinrichs, G. Miao
{"title":"High-Voltage Low-Power Analog Design in Nanometer CMOS Technologies","authors":"S. Bazarjani, L. Mathe, D. Yuan, J. Hinrichs, G. Miao","doi":"10.1109/BIPOL.2007.4351857","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351857","url":null,"abstract":"Higher level of integration, lower cost and higher speed are driving CMOS technology deeper into nanometer regime of 65 nm and below. To ensure reliability of these 65 nm devices, power supply is scaled down to 1.2 V. However, certain functions such as high-speed USB and audio CODEC require higher power supply voltages of 3.3 V and 2.1 V. The minimum supply voltage of CODEC is determined by the power that needs to be delivered to the speakers or maximum input signal voltage that needs to be processed. Higher supply voltage provides lower power consumption for many analog functions. In this paper, methods of high voltage analog circuit integration into a 65 nm mixed-signal system are discussed. These integration methods include system in package (SiP) and system on chip (SoC.) SiP offers a low cost and fast to market option for mixed analog/digital integration. In some cases, system on chip (SoC) is desired due to lower power dissipation. High voltage active RC and switched-capacitor circuit design techniques using thin-oxide or combination of thin-and thick-oxide transistors are presented.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130862551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
High accuracy temperature bipolar modeling for demanding Bandgap application 高精度温度双极模型，要求苛刻的带隙应用
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351864
F. Pourchon, H. Beckrich-Ros, C. Raya, C. Faure, B. Gautheron, J. Blanc, B. Reynard, D. Céli
{"title":"High accuracy temperature bipolar modeling for demanding Bandgap application","authors":"F. Pourchon, H. Beckrich-Ros, C. Raya, C. Faure, B. Gautheron, J. Blanc, B. Reynard, D. Céli","doi":"10.1109/BIPOL.2007.4351864","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351864","url":null,"abstract":"VDD reduction in advanced CMOS IC's push for reduced temperature stability spread of bipolar based BGR. To achieve this goal, a reliable extraction methodology for IC temperature coefficient is detailed. Based on corner lot measurements, a worst-case bipolar model is built. Bandgap circuit measurements are finally compared to statistical simulations.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132980352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Large-Signal Performance, Linearity, and Reliability Characteristics of Aggressively-Biased Cascode SiGe HBTs for Power Amplifier Applications 大信号性能，线性和可靠性特性的侵略性偏置级联码SiGe hbt功率放大器应用
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351854
C. Grens, J. Cressler, A. Joseph
{"title":"Large-Signal Performance, Linearity, and Reliability Characteristics of Aggressively-Biased Cascode SiGe HBTs for Power Amplifier Applications","authors":"C. Grens, J. Cressler, A. Joseph","doi":"10.1109/BIPOL.2007.4351854","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351854","url":null,"abstract":"Power performance, linearity, and reliability are investigated for aggressive VC bias (i.e., under strong base-current reversal and pinch-in) on cascode SiGe HBTs, in order to determine the influence of avalanche effects on PA performance and reliability. Moderate gain and linearity degradation are associated with excessive VC bias (pinch-in), and dynamic stress at high VC shows behavior similar to mixed-mode (simultaneous high JE + high VCB) stress. No significant degradation to PA performance was observed during dynamic stress.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129368942","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
The Doherty Power Amplifier with Collector Current and Voltage Controls for Handset Applications Doherty功率放大器与集电极电流和电压控制的手机应用
2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 2007-10-22 DOI: 10.1109/BIPOL.2007.4351847
H.D. Bui, D. Teeter, D. Widay, S. Mil'shtein
{"title":"The Doherty Power Amplifier with Collector Current and Voltage Controls for Handset Applications","authors":"H.D. Bui, D. Teeter, D. Widay, S. Mil'shtein","doi":"10.1109/BIPOL.2007.4351847","DOIUrl":"https://doi.org/10.1109/BIPOL.2007.4351847","url":null,"abstract":"A Doherty power amplifier (DPA) with collector current and voltage controls for CDMA and WCDMA |(W)CDMA| application has been investigated and implemented using a standard HBT process. The impact of bias of the peak amplifier on linearity is also discussed. The statistical average current is used to evaluate the current consumption improvement of the DPA with collector current and voltage controls as compared to a single-ended class AB power amplifier.","PeriodicalId":356606,"journal":{"name":"2007 IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128571722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信