PNP SiGe: C HBT Optimization in a Low-Cost CBiCMOS Process

Abstract

We present results of pnp transistor optimization in a low-cost, complementary SiGe:C BiCMOS process. A particular goal was to provide well matched parameters of pnp and npn devices. A high pnp transistor current gain of 100 was reached without compromising the LF noise behavior. Two types of pnp transistors are presented showing BVCEO values of 3.3 V and 4.5 V, respectively, a (BVCEO times fT) product in excess of 260 VGHz, fmax values up to 105 GHz, and a minimum noise figure of 1.2 dB at 5 GHz. These pnp data fit well to the data of the medium-voltage npn transistors also available in this CBiCMOS process.