Z. An, Hui-Min Liu, Xiu-Wei Tian, Xiao-yan Wang, Cangmin Wang
{"title":"Collimating light beams semiconductor laser diode array","authors":"Z. An, Hui-Min Liu, Xiu-Wei Tian, Xiao-yan Wang, Cangmin Wang","doi":"10.1109/ICSICT.2001.982125","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.982125","url":null,"abstract":"In the technique of DPL end-pumped method is adopted generally, but in this application it's essential for the semiconductor laser to have very high power density. Because it exists a intrinsic divergence angle of about 40/spl deg/ degrees in the direction of \"fast\" axle for the semiconductor laser diodes. Consequently, it sharply decreases the light power density in the direction of light propagation. It's an effective way of collimating the divergence light beams in the direction of \"fast\" axle for improving power density. In this letter we describe the technique of collimating the divergence angle in the direction of \"fast\" axle performed on the single bar of semiconductor laser by employing fiber core as microlens and approximately collimating light beams with divergence of less than 6/spl deg/ degrees, stacking the single bar in two dimensions, we got two-dimension laser array with the output power of 1300 watts and the divergence is less than 10 (FWHM) degrees. Four 1300W laser arrays have been assembled together and 5000W power has been produced.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130751781","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An analytical model for AlGaN/GaN HFET and the electrical characteristics","authors":"Nuo Liu, J. Xia","doi":"10.1109/ICSICT.2001.982115","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.982115","url":null,"abstract":"An new velocity-field analytical model for AlGaN/GaN HFETs is presented which includes the compensation effect. It is in good agreement with Monte Carlo results. We also investigate the electrical characteristics of the devices. The model predicts that the compensation effect could not be neglected when the compensation ratio r>0.6, and the I-V characteristics will fall when the gate voltage V/sub g/ is high enough.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127881549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Z. Zheng, B. Shen, C. Jiang, R. Zhang, Y. Shi, Y.D. Zheng, S.L. Guo, G. Zheng, J. Chu
{"title":"Characterization of the two-dimensional electron gas in Al/sub x/Ga/sub 1-x/N/GaN heterostructures with two subbands occupied","authors":"Z. Zheng, B. Shen, C. Jiang, R. Zhang, Y. Shi, Y.D. Zheng, S.L. Guo, G. Zheng, J. Chu","doi":"10.1109/ICSICT.2001.982117","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.982117","url":null,"abstract":"Magnetotransport properties of the two-dimensional electron gas (2DEG) in Al/sub x/Ga/sub 1-x/N/GaN heterostructures have been investigated. We extrapolate that the second subband in the triangular quantum well at the heterointerface starts to be populated at a 2DEG concentration of about 7.23 /spl times/ 10/sup 12/ cm/sup -1/. The quantum scattering time related to the first subband is obtained as 0.144-0.146 ps for the heterostructures. Intersubband scattering is also observed in the heterostructures.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125379556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A multiple-valued single-electron SRAM by the PADOX process","authors":"H. Inokawa, A. Fujiwara, Y. Takahashi","doi":"10.1109/ICSICT.2001.981456","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.981456","url":null,"abstract":"Multiple-valued static memory consisting of a single-electron transistor (SET) and a MOSFET is proposed. The memory operation is verified by using transistors fabricated by the CMOS-compatible pattern-dependent oxidation (PADOX) process. The results indicate that a dramatic increase of CMOS memory density can be attained by the use of a SET with multiple-valued capability.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126777213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Summary of HV power ICs protecting circuit design","authors":"Yan Han, Jiahua Chen, Jian Liang","doi":"10.1109/ICSICT.2001.981441","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.981441","url":null,"abstract":"Power IC (PIC) is a special kind of IC that is difficult in design and fabrication. But it has found rapid growth in recent years as a result of an ever-increasing market demand. More and more functions are added into Power IC. High voltage and large current are common working conditions in PIC, so protecting circuits are very important in PIC. Protecting circuits can be classified according to their functions into groups such as overcurrent protection circuit, over-heat protection circuit, over/under voltage protection circuits and so on. They take up a sizable portion in area of power IC chip, and, therefore, are of great importance in power IC design. This paper will give the insight look at some typical and novel protection circuits based on an analysis of some new generation products of high-voltage power ICs.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123200411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y.X. Li, C. Liu, H.Y. Guo, X. Wang, M. Pan, Y. Xu, D. Yang, D. Que
{"title":"New intrinsic gettering process in Czochralski-silicon wafer","authors":"Y.X. Li, C. Liu, H.Y. Guo, X. Wang, M. Pan, Y. Xu, D. Yang, D. Que","doi":"10.1109/ICSICT.2001.981472","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.981472","url":null,"abstract":"A new intrinsic gettering (IG) process was established in Czochralski-silicon (CZSi) wafer subjected to a one-step annealing sequence based on the interaction of interstitial oxygen with the defects induced by neutron irradiation. The defects in Czochralski silicon wafer can be controlled by neutron irradiation. When irradiation flux changes from 5/spl times/10/sup 17/ to 1.5/spl times/10/sup 18/ cm/sup -2/, combining with one-step high-temperature annealing procedure, the neutron irradiated wafers showed an excellent intrinsic gettering effect.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123321717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Operation of a 3D nano-electron cell for logic and memory","authors":"C. Hu, J. Jiang, Q. Cai","doi":"10.1109/ICSICT.2001.982162","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.982162","url":null,"abstract":"In this paper, by exploring the negative differential conductance (NDC) of a resonant interband tunneling diode (RITD), e.g. InAs/AsSb/GaSb, and the interaction between metallic nano-dots, we present and demonstrate a theoretical model of a novel bi-stable and 4-stable operation on the basis of the three-dimensional (3D) nano-electron cell which consists of metallic nano-dots forming into compact and two-dimension (2D) arrays on the surface of RITDs. We present a simplified circuit model without considering single-electron effects between metallic nano-dots, where the RITD is described by a simplified physics-based model. We investigate numerical results for this 3D nano-electron cell and their dependence on the relevant parameters. At last calculations based on Monte Carlo simulation considering single-electron effects between metallic nano-dots demonstrate that our simplified model is comprehensive enough to describe this system in nature. The calculated results demonstrate it is promising for future nano-logic and nano-memory applications.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126582463","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jian-Lin Wei, Langfeng Mao, Mingzhen Xu, Changhua Tan
{"title":"The experimental investigation on stress-induced leakage current under Fowler-Nordheim constant voltage stress","authors":"Jian-Lin Wei, Langfeng Mao, Mingzhen Xu, Changhua Tan","doi":"10.1109/ICSICT.2001.982066","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.982066","url":null,"abstract":"In this investigation, we have presented the Stress-Induced Leakage Current (SILC) phenomenon in ultrathin gate oxide p-MOSFET under FN high field stress. The SILC in ultrathin gate oxide is proportional to exp(/spl beta/ /spl middot/ E/sub ox/). The SILC plot of ln(J/sub SILC/) versus E/sub ox/ is linear. The intercept and slope of this straight line of ln(J/sub SILC/) vs. E/sub ox/ plot will change with stress time, the intercept increases and the slope decreases, during the initial stress stage and saturates after long stress time. The intercept and slope of the SILC plot and ln(J/sub SILC/) all not only can be fitted by two exponential decay functions, but also the time constant, /spl tau//sub 1/ and /spl tau//sub 2/, of the fitted parameters are the same value. So we think there two types of trap play very important role in SILC of ultrathin oxide.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"181 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114211562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Ren, Yanxiang Liu, Jianshe Liu, Litian Liu, Zhijian Li
{"title":"PZT based bulk acoustic wave RF filters","authors":"T. Ren, Yanxiang Liu, Jianshe Liu, Litian Liu, Zhijian Li","doi":"10.1109/ICSICT.2001.981606","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.981606","url":null,"abstract":"Analytical solutions of the wave equation for the electrode-piezoelectric-electrode sandwich structure in film bulk acoustic resonators (FBARs) are presented. The impedance for PZT based FBAR is derived utilizing proper boundary conditions and their material parameters. A novel method to adjust the resonant frequency is proposed corresponding to the process feasibility and material properties. Ferroelectric-based RF filters composed of FBARs are designed.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114250886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L. Zhi-nong, Chen Pei-yi, Yan Yun-jie, Tsien Pei-hsin
{"title":"SiGe HV/CVD epitaxy growth on patterned Si substrate","authors":"L. Zhi-nong, Chen Pei-yi, Yan Yun-jie, Tsien Pei-hsin","doi":"10.1109/ICSICT.2001.981550","DOIUrl":"https://doi.org/10.1109/ICSICT.2001.981550","url":null,"abstract":"This letter investigates the SiGe epitaxy growth on patterned Si substrate (patterned SiO/sub 2/ on Si substrate), and shows that the crystal quality of the SiGe/Si interface is excellent and that the SiGe epitaxial thin film on Si substrate in the patterned window is a single crystal.","PeriodicalId":349087,"journal":{"name":"2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121120925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}