2012 IEEE International Reliability Physics Symposium (IRPS)最新文献_第6页

A comprehensive and critical re-assessment of 2-stage energy level NBTI model 对两阶段能量水平NBTI模型的全面和关键的再评估

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241933

S. Gupta, B. Jose, K. Joshi, A. Jain, M. Alam, S. Mahapatra

引用次数: 19

Copper through silicon via (TSV) for 3D integration 铜通硅通孔(TSV)用于3D集成

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241774

C. Kothandaraman, B. Himmel, J. Safran, J. Golz, G. Maier, M. Farooq, T. Graves-abe, W. Landers, R. Volant, K. Petrarca, F. Chen, T. Sullivan, G. Larosa, N. Robson, R. Hannon, S. Iyer

引用次数: 9

Layout sensitivities of transient external latchup 瞬态外闭锁的布局灵敏度

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241821

A. Kripanidhi, E. Rosenbaum

引用次数: 9

Effect of interface states on 1T-FBRAM cell retention 界面状态对1T-FBRAM细胞保留的影响

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241918

M. Aoulaiche, N. Collaert, P. Blomme, E. Simoen, L. Altimime, G. Groeseneken, M. Jurczak, L. Mendes Almeida, C. Caillat, N. Mahatme

引用次数: 5

Generalized successive failure methodology for non-weibull distributions and its applications to SiO2 or high-k/SiO2 bilayer dielectrics and extrinsic failure mode 非威布尔分布的广义连续失效方法及其在SiO2或高k/SiO2双层介质中的应用和外在失效模式

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241863

E. Wu, J. Suñé, C. LaRow

引用次数: 4

On-chip silicon odometers and their potential use in medical electronics 片上硅里程表及其在医疗电子领域的潜在应用

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241835

J. Keane, C. Kim

引用次数: 4

Positive bias temperature instability induced positive charge generation in P+ Poly/SiON pMOSFET's 正偏置温度不稳定性诱导P+ Poly/SiON pMOSFET产生正电荷

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241939

Hokyung Park, P. Nicollian, V. Reddy

引用次数: 9

Impacts of Random Telegraph Noise on FinFET devices, 6T SRAM cell, and logic circuits 随机电报噪声对FinFET器件、6T SRAM单元和逻辑电路的影响

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241886

M. Fan, V. Hu, Yin-Nien Chen, P. Su, C. Chuang

{"title":"Impacts of Random Telegraph Noise on FinFET devices, 6T SRAM cell, and logic circuits","authors":"M. Fan, V. Hu, Yin-Nien Chen, P. Su, C. Chuang","doi":"10.1109/IRPS.2012.6241886","DOIUrl":"https://doi.org/10.1109/IRPS.2012.6241886","url":null,"abstract":"This paper analyzes the impacts of single trap induced Random Telegraph Noise (RTN) on scaled FinFET devices in tied-gate and independent-gate modes, 6T SRAM cell and logic circuits. The dependence of RTN amplitude on trap location, EOT and temperature is evaluated through 3D atomistic TCAD simulations. It is observed that charged trap located near the bottom of sidewall (gate) interface, in the middle region between the source/drain results in most significant impact. EOT scaling and higher temperature improve the immunity to RTN. RTN degradation in independent-gate mode and the dependency on the location of the trap and current conduction path are analyzed. We show that planar BULK device, with larger Subthreshold Swing (S.S.) and comparable trap-induced VT shift (ΔVT), exhibits less nominal RTN degradation than FinFET for trap placed in the worst position. However, the larger variability and surface conduction characteristic of planar BULK device result in broader dispersion and larger worst-case degradation than FinFET with smaller variability and volume conduction inside the silicon fin. For FinFET 6T SRAM cell, the READ Static Noise Margin (RSNM) of 64 possible combinations from trapping/de-trapping in each cell transistor is examined. Because of reduced carriers with decreasing supply voltage (Vdd), the relative importance of RTN on the cell stability increases. The leakage/delay of FinFET inverter, 2-Way NAND and 2-To-1 multiplexer are investigated using mixed-mode TCAD simulations. The existence of RTN is found to cause ~24-27% and 13-15% variation in leakage and delay at Vdd=0.4V, respectively, for the logic circuits evaluated.","PeriodicalId":341663,"journal":{"name":"2012 IEEE International Reliability Physics Symposium (IRPS)","volume":"1720 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125059274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Effects of gate process on NBTI characteristics of TiN gate FinFET 栅极工艺对TiN栅极FinFET NBTI特性的影响

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241913

Jin Ju Kim, M. Cho, L. Pantisano, T. Chiarella, M. Togo, N. Horiguchi, G. Groeseneken, B. Lee

引用次数: 3

A study of the influence of electron beam on electrical characteristics of LOCOS device 电子束对LOCOS器件电气特性影响的研究

2012 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2012-04-15 DOI: 10.1109/IRPS.2012.6241904

H. Lin, C. H. Chao

{"title":"A study of the influence of electron beam on electrical characteristics of LOCOS device","authors":"H. Lin, C. H. Chao","doi":"10.1109/IRPS.2012.6241904","DOIUrl":"https://doi.org/10.1109/IRPS.2012.6241904","url":null,"abstract":"Electrical characteristic changes in scaled MOSFET devices have been widely reported due to electron beam (EB) irradiation. For local oxidation of silicon (LOCOS) devices, the effects of EB-induced damage when performing measurements using an SEM based nanoproer, however, have rarely been reported. EB penetration into the dielectrics, resulting in the modification of the physical properties of the dielectric layer, could be a concern, not only for scaled devices, but also for LOCOS devices. This study reveals that the effect of EB on LOCOS devices can be measured using a scanning electron microscope (SEM) based nanoprober with inducing electrical characteristic changes. These changes are accounted for by the hole trapping at the birdsbeak, which has a significant effect on both the junction electrical characteristics and punchthrough characteristics in LOCOS isolation structures when an SEM is employed for probe guidance. Further, some preliminary experimental results, not included in this paper, show that lowering the EB acceleration voltage is found to not be able to significantly eliminate the effects of EB-induced damage during device inspections in failure analysis procedures. More advanced studies are currently under investigation.","PeriodicalId":341663,"journal":{"name":"2012 IEEE International Reliability Physics Symposium (IRPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123775078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0