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2022 IEEE VLSI Device Circuit and System (VLSI DCS)最新文献

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Partially Depleted Silicon-on-Insulator (PDSOI) MOSFETs for RF Switching Applications 部分耗尽绝缘体上硅(PDSOI) mosfet用于射频开关应用
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811445
Tara Prasanna Dash, C. K. Maiti, Devika Jena
{"title":"Partially Depleted Silicon-on-Insulator (PDSOI) MOSFETs for RF Switching Applications","authors":"Tara Prasanna Dash, C. K. Maiti, Devika Jena","doi":"10.1109/VLSIDCS53788.2022.9811445","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811445","url":null,"abstract":"The industry standard for RF-SOI systems is presently Partially Depleted silicon-on-insulator MOSFETs. Substrate losses, crosstalk, and non-linearities are the biggest obstacles to creating high-performance RF ICs in Si-based technology. Several critical parameters like RON, COFF, breakdown voltage, and RF voltage distribution (balance) across a stack of several MOSFETs are the key figures-of-merit (FOM) for RF switch applications. In this work, predictive TCAD modeling and simulations are performed to analyze the role of the back-end of line process and the electromagnetic properties of the substrate that influence the performance of RF switches. The role of key parameters across a stack of several FETs is analyzed in detail. The consequences of various SOI MOSFET effects and their impact on RF switch applications are discussed. The methodology and simulation framework discussed may be useful for the design of RF switches in other similar RF CMOS technologies.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125456728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
All Optical Logic XNOR Gate Using Dual Control Dual SOA TOAD (DCDSTOAD) 采用双控制双SOA的全光逻辑XNOR门(DCDSTOAD)
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811448
K. Maji, K. Mukherjee, M. Mandal
{"title":"All Optical Logic XNOR Gate Using Dual Control Dual SOA TOAD (DCDSTOAD)","authors":"K. Maji, K. Mukherjee, M. Mandal","doi":"10.1109/VLSIDCS53788.2022.9811448","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811448","url":null,"abstract":"All optical dual control dual Semiconductor Optical Amplifiers Tera hertz optical asymmetric demultiplexer (DCDSTOAD) based XNOR gate are proposed and described. We have shown simulated output of the XNOR gate which confirms practical feasibility of this gate. We found high Q value ( 9.82 dB), high Q value indicates low bit error rate for transmission and reception of signals.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125697882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
RF/Analog Performance Analysis of Electrostatically Doped Dual Pocket Vertical Tunnel Field Effect Transistor 静电掺杂双口袋垂直隧道场效应晶体管的射频/模拟性能分析
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811496
Amit Bhattacharyya, Madhusree Banerjee, Papiya Debnath, D. De, M. Chanda
{"title":"RF/Analog Performance Analysis of Electrostatically Doped Dual Pocket Vertical Tunnel Field Effect Transistor","authors":"Amit Bhattacharyya, Madhusree Banerjee, Papiya Debnath, D. De, M. Chanda","doi":"10.1109/VLSIDCS53788.2022.9811496","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811496","url":null,"abstract":"Reduction of ambipolar characteristics, including enhanced Analog and RF figure of merits (FoMs) has been proposed by utilizing a charge plasma (CP) based doping less (DL) tunnel FET (TFET) configuration. In addition, the doping less configuration affords easiness in fabrication as well as protection next to random dopant fluctuations (RDFs) in contrast through the traditionally doped Tunnel-FET. Now, by introducing tunneling metallic plate (TMP) double (top and bottom) pockets of n+ type have been structured merely adjacent to source and channel interface. An evaluation of the presentations of recommended electrostatically doping double pocket vertically TFET (ED-DP-V-TFET) arrangement with usual lateral (L) and solitary pocket (SP) TFETs have been executed regarding device features. The suggested representation proposes advanced appearance than other TFET contestant. Furthermore, the proposed form is examined for Analog and RF FoMs through the deviation of work-function (WF) of TE and dielectric thickness (Tox) beneath TE with SILVACO ATLAS simulator. Efficiency of the suggested configuration in Analog and RF realm has been validated by the simulated outcomes.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133745588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Temperature Dependence on Fin-FET Electrical Parameters for Al2O3 and HfO2 Dielectric Materials: A Comparative Study Al2O3和HfO2介电材料翅片fet电参数对温度依赖性的比较研究
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811493
Salini Singh, Bhaskar Roy, M. A. Billaha, R. Dutta, S. K. Choudhary
{"title":"Temperature Dependence on Fin-FET Electrical Parameters for Al2O3 and HfO2 Dielectric Materials: A Comparative Study","authors":"Salini Singh, Bhaskar Roy, M. A. Billaha, R. Dutta, S. K. Choudhary","doi":"10.1109/VLSIDCS53788.2022.9811493","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811493","url":null,"abstract":"Scaling down of device dimensions comes with both pros and cons which includes higher device density, lesser area requirement and increase in leakage contribution as well. This leakage sources limit the device scaling up-to certain dimensions but by introduction of multi gate Field Effect Transistors (FET) and use of different gate oxides, the device dimension can be tuned accordingly so that the leakage effects are minimized. Temperature plays a key role to affect the device performance as the size is reduced further. This paper deals with the effect on Fin-FET device performance for different gate oxides by varying the environment temperature from 273 K to 450 K.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115565480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Impact of Composite Trench Stepped Hetero Channel MOSFET on Analog Performance 复合沟槽阶跃异质通道MOSFET对模拟性能的影响
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811466
S. Mohanty, Sikha Mishra, G. P. Mishra
{"title":"Impact of Composite Trench Stepped Hetero Channel MOSFET on Analog Performance","authors":"S. Mohanty, Sikha Mishra, G. P. Mishra","doi":"10.1109/VLSIDCS53788.2022.9811466","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811466","url":null,"abstract":"In this work a new laterally InGaAs/InAs/ InGaAs composite channel layer metal step gate has been proposed. Due to the formation of a composite layer near the channel, it enhances the electrostatic control along the channel, which offers an enhancement in the current. In the existing device, the gate area is split into three different steps with increasing effective oxide thickness (EOT) from source to drain. Subsequently, the device achieves lower gate to drain capacitance as a result of decreasing On-resistance. Based on 2D TCAD simulation the analog performances like threshold voltage, On current, transconductance, and subthreshold slope are analyzed. From the simulation, it is observed that stepped composite (CS MOSFET) offers improved performance as compared to conventional MOSFET (C MOSFET).","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123504437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Dependence of Gate Leakage Current on Efficacy of Gate Field Plate in AlGaN/GaN HEMT AlGaN/GaN HEMT栅漏电流对栅场极板效能的影响
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811463
Chanchal Chanchal, Ajay Kumar Visvkarma, A. Malik, R. Laishram, D. S. Rawal, M. Saxena
{"title":"Dependence of Gate Leakage Current on Efficacy of Gate Field Plate in AlGaN/GaN HEMT","authors":"Chanchal Chanchal, Ajay Kumar Visvkarma, A. Malik, R. Laishram, D. S. Rawal, M. Saxena","doi":"10.1109/VLSIDCS53788.2022.9811463","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811463","url":null,"abstract":"GaN HEMTs finds applications in Radio Frequency (RF) and high-power device and sensing applications. Several types of GaN HEMT device structures have been studied and are being used in various forms. In this article, a comparative study of gate field plated device with a conventional GaN HEMT device has been studied. A close relationship in gate leakage current with off-state breakdown pattern has been observed. The field plate starts working after a certain rise in the gate-drain electric field creating a hump in off-state breakdown characteristic. In low gate leakage device this pattern is absent signifying the effectiveness of gate field plate in fix voltage range.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128655866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Internet of Things (IoT) Based Continuous Growth Rate Monitoring System of Plant Stem 基于物联网的植物茎部连续生长速率监测系统
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811432
Shikha Nayak, Subir Das, B. Chakraborty, T. Chakraborty, Kishor Roy
{"title":"Internet of Things (IoT) Based Continuous Growth Rate Monitoring System of Plant Stem","authors":"Shikha Nayak, Subir Das, B. Chakraborty, T. Chakraborty, Kishor Roy","doi":"10.1109/VLSIDCS53788.2022.9811432","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811432","url":null,"abstract":"In the field of precision agriculture, plant growth rate monitoring is an important issue to study the influence of soil, weather, or agronomic practices on its growing condition. A plant’s growth rate can be evaluated by measuring the radial/ circumference growth of its body parts like stem, trunk, branch, and fruit. In this paper, the internet of things (IoT) based plant’s stem growth rate monitoring system has been developed. Here, the most commonly used PC (Personal Computer) optical mouse is used as a sensor for monitoring the radial growth of the sunflower stem. To sense the radial growth of the stem, a paper-based strap is used across the stem. A computer mouse is used for the measurement of strap movement which is occurred due to the radial growth of the stem. Eventually, the mouse sensor output has been calibrated using Wi-Fi enabled processing unit and transmits the same data to the server for real-time monitoring. To store the growth rate information, an open-source IoT platform namely ‘ThingSpeak’ has been used. In presence of the ambient condition, the performance of the developed system has been tested for a long duration of time over a sunflower stem and provided satisfactory results.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"202 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124532339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Density Functional Theory (DFT) Analysis on the Structural, Electronic, and Optical Properties of Monoclinic HfO2 密度泛函理论(DFT)分析单斜斜HfO2的结构、电子和光学性质
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811464
J. Kar, S. Chaudhury, Neerja Dharmale
{"title":"Density Functional Theory (DFT) Analysis on the Structural, Electronic, and Optical Properties of Monoclinic HfO2","authors":"J. Kar, S. Chaudhury, Neerja Dharmale","doi":"10.1109/VLSIDCS53788.2022.9811464","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811464","url":null,"abstract":"Structural and optoelectronic properties of monoclinic hafnium dioxide (m-HfO2) are explored and studied using density functional theory (DFT). For the computation, OLCAO-MGGA-TB09+c exchange-correlation has been used. The electronic properties such as band diagram and both densities of state (DOS) are analyzed in depth. The bandgap value obtained using MGGA-TB09+c exchange-correlation is 5.73 eV. In addition, we analyzed the different optical properties such as dielectric function, refractive index, extinction coefficient, reflectivity, optical conductivity, energy loss function, and absorption coefficient of the m-HfO2 compound and observed that the results so obtained greatly matches with previously reported computational and experimental data. It is found that the MGGA-TB09 technique gives good results on all properties compared to existing computational work.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130231628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of an Improved Tie-line Power Model for a PEV Based Interconnected Microgrid Under AGC Operation AGC运行下基于PEV的互联微电网的改进联络线功率模型设计
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/vlsidcs53788.2022.9811489
Prasun Sanki, M. Basu, P. Pal, D. Das, Sindhura Gupta
{"title":"Design of an Improved Tie-line Power Model for a PEV Based Interconnected Microgrid Under AGC Operation","authors":"Prasun Sanki, M. Basu, P. Pal, D. Das, Sindhura Gupta","doi":"10.1109/vlsidcs53788.2022.9811489","DOIUrl":"https://doi.org/10.1109/vlsidcs53788.2022.9811489","url":null,"abstract":"Nowadays, microgrid is utilised as a flexible replacement to the conventional power system. Therefore, special attention must be provided for the proper microgrid based power system design. Earlier, various articles presented the interconnected microgrid operation. However, less attention is given towards the proper tie-line modeling considering high resistance-inductive reactance (R/X) ratio in the interconnected microgrid operation. Considering the research gap, towards the proper designing of tie-line modeling, this paper presents an improved power tie-line model in an interconnected microgrid in presence of plug-in electric vehicle. Various case studies are carried out for validating the proper designing technique under various load disturbances in presence of uncertain output power from intermittent power generating units. The functioning of the proposed work is validated, connecting the proposed model in a 12-node distribution network. The proposed model shows its effectiveness and superiority compared to other available designing conditions.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115944231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Capacitive Memory Using GLAD Synthesized Annealed SnO2 Nanowires Array as a Dielectric 用GLAD合成退火SnO2纳米线阵列作电介质的电容存储器
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811450
Priyanka Chetri, J. C. Dhar
{"title":"Capacitive Memory Using GLAD Synthesized Annealed SnO2 Nanowires Array as a Dielectric","authors":"Priyanka Chetri, J. C. Dhar","doi":"10.1109/VLSIDCS53788.2022.9811450","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811450","url":null,"abstract":"This paper presents the fabrication of as-deposited and annealed SnO<inf>2</inf> NWs via GLAD (glancing angle deposition) technique. On investigation, the 650 °C SnO<inf>2</inf> NWs show improvement in its crystallinity. The capacitive behavior of both the device was analyzed by evaluating the capacitance-voltage (CV) and conductance-voltage (G-V) characteristics for both asdeposited and annealed sample by varying frequencies. The annealed device showed improved capacitive memory with interface trap density (9.7×10<sup>9</sup> eV<sup>-1</sup>cm<sup>-2</sup>), charge storage density of 5.45×10<sup>10</sup> cm<sup>-2</sup> and memory window of ~ 0.89 V at ± 8V for 1MHz.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121316524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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