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2022 IEEE VLSI Device Circuit and System (VLSI DCS)最新文献

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Tweet Classification and Sentiment Analysis of Covid 19 Epidemic by Applying Hybrid Based Techniques 基于混合技术的新冠肺炎疫情推文分类与情感分析
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811438
Mauparna Nandan, Soma Mitra, Sharmistha Dey
{"title":"Tweet Classification and Sentiment Analysis of Covid 19 Epidemic by Applying Hybrid Based Techniques","authors":"Mauparna Nandan, Soma Mitra, Sharmistha Dey","doi":"10.1109/VLSIDCS53788.2022.9811438","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811438","url":null,"abstract":"World wide spread of COVID-19 pandemic, is throttling the normal life nearly for two years and claiming millions of life all over the globe. Starting from Wuhan of China it crosses more than 200 countries, thereby imposing a overwhelming challenge to health care system. On the other hand, there has been unprecedented advancement of the social media, namely, Twitter, Facebook, WhatsApp and Instagram etc. in an exponential manner. The essence of this paper is to extract and elucidate the opinion or sentiments of the people all around the globe regarding Coronavirus pandemic based on Twitter data. The analysis are based on both lexicon-based approach followed by machine learning algorithms and aims to express the state-of-the-art of the sentiment analysis on the current Coronavirus epidemic prevailing in the entire world and the awareness of the people regarding the disease, its symptoms and impact followed by the preventive measures that need to be undertaken.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123594221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Single Event Transient Effect on Tapered Angle Hetero-junction Dopingless TFET for Radiation Sensitive Applications 用于辐射敏感应用的锥形异质结无掺杂TFET的单事件瞬态效应
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/vlsidcs53788.2022.9811459
Monika Sharma, R. Narang, M. Saxena, Mridula Gupta
{"title":"Single Event Transient Effect on Tapered Angle Hetero-junction Dopingless TFET for Radiation Sensitive Applications","authors":"Monika Sharma, R. Narang, M. Saxena, Mridula Gupta","doi":"10.1109/vlsidcs53788.2022.9811459","DOIUrl":"https://doi.org/10.1109/vlsidcs53788.2022.9811459","url":null,"abstract":"In this paper, a brief study of the single event effect transient effect is presented for gate engineered tapered angle hetero-junction dopingless TFET for examining its reliability in a radiation-sensitive environment. When a heavyion particle strikes the TFET structure, it leads to the generation and recombination of the charged particles along the track path of the ions. The effect of the different energy densities of charged ion is studied, in which with an increase in the LET’s the leakage current also increases at 10 MeV.cm2/mg it reaches 0.453 mA/µm. At 1 MeV.cm2/mg of the energy density of ions is radiated on the whole device structure at different positions; it is observed that the drainchannel region is the most sensitive region of the structure studied.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116316219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
RF Analysis of a Fully Gate Covered Junctionless FinFET for Improved Performance 全栅极覆盖无结FinFET的射频分析以提高性能
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811481
Aman Tyagi, Gaurav Mangal, R. Chaujar
{"title":"RF Analysis of a Fully Gate Covered Junctionless FinFET for Improved Performance","authors":"Aman Tyagi, Gaurav Mangal, R. Chaujar","doi":"10.1109/VLSIDCS53788.2022.9811481","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811481","url":null,"abstract":"This work is an analysis of various RF performance figure of merits of a fully gate-covered Junctionless FinFET at two gate lengths (20nm and 40nm) with a high-k dielectric layer as gate oxide and is compared a conventional FinFET. The simulation results exhibit great performance increment for the smaller 20nm device terms of cutoff frequency(fT) which shows about 20% increase, the maximum oscillation frequency (fmax) which also amplified by more than five times. Other RF parameters such as Gain Frequency Product (GFP) and Transconductance Frequency Product (TFP) for the nm device, also exhibited a considerable increment over the conventional device. Gain transconductance frequency Product (GTFP) was also observed to be enhanced by more than 2 times. All these parameters make the device attractive candidate for RF applications.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127875682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Survey on Field Effect Transistor Based Hydrogen and Nitrogen Gas Sensors 基于场效应晶体管的氢气和氮气传感器研究进展
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811461
Koushik Ghosh, Arpita Ghosh
{"title":"A Survey on Field Effect Transistor Based Hydrogen and Nitrogen Gas Sensors","authors":"Koushik Ghosh, Arpita Ghosh","doi":"10.1109/VLSIDCS53788.2022.9811461","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811461","url":null,"abstract":"The presented work encircles the survey on different types of Nitrogen and Hydrogen gas sensor with the modified field-effect transistors (FETs) structures. By modifying the structure, through addition of different kind of particles (palladium, platinum, tungsten) or tubes (carbon nanotubes) , the unique sensing device designs are achieved. The structural overview of CNT-based FETs (CNTFETs), Pd-FET, Dual FET, and Tungsten gate FET for Nitrogen and Hydrogen gas detection, their sensing mechanisms, sensitivity are mainly the emphasis of this review work. The COSFET (Chalcogenide-oxide-siliconFET), CNTFET, WO3MOS2 (Tungsten trioxide- Molybdenum disulfide) , are reviewed as nitrogen gas sensor having sensitivity of 100,1.2,45 respectively with-respect-to time and PNINGAA-FET(n+ source pocket doped PIN gate all around tunnel FET), Pd-MOSFET(Palladium-based Trench Gate MOSFET) and Dual-FET used as a hydrogen gas sensor having sensitivity of 105, 10 and 100 with-respect-to pressure in Torr.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126266005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An Integrated System for Drivers’ Drowsiness Detection Using Deep Learning Frameworks 基于深度学习框架的驾驶员困倦检测集成系统
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811442
Biswarup Ganguly, D. Dey, S. Munshi
{"title":"An Integrated System for Drivers’ Drowsiness Detection Using Deep Learning Frameworks","authors":"Biswarup Ganguly, D. Dey, S. Munshi","doi":"10.1109/VLSIDCS53788.2022.9811442","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811442","url":null,"abstract":"Drowsiness or sleepiness is a transition stage between alertness and sleep. Drowsy driving causes collisions, injuries and deaths. This paper presents an integrated system for drivers’ drowsiness detection based on deep learning frameworks. The integrated system consists of three parts, i.e., eye region detection, eye state detection and classification, and an alert system generation based on drowsiness level. Faster region based convolutional neural network (f-RCNN) has been employed for eye region detection to extract eye regions from facial images of driver with complicated background. In the next stage, image containing only eye region is fed into a CNN for necessary identification. Finally, an alert system has been generated based on the drowsiness level of drivers’ eye states. The proposed module has been implemented using an Atmega328p microcontroller to achieve a real time evaluation.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126197960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Signature Recognition and Detection of Skilled Forgeries Using Image Transformation and Multistream CNN 基于图像变换和多流CNN的熟练伪造签名识别与检测
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/vlsidcs53788.2022.9811485
Papiya Das, Swarnabja Bhaumik, Subhrapratim Nath
{"title":"Signature Recognition and Detection of Skilled Forgeries Using Image Transformation and Multistream CNN","authors":"Papiya Das, Swarnabja Bhaumik, Subhrapratim Nath","doi":"10.1109/vlsidcs53788.2022.9811485","DOIUrl":"https://doi.org/10.1109/vlsidcs53788.2022.9811485","url":null,"abstract":"Person identification through their credentials such as biometrics or signature is very important for one’s privacy and has become the most integral part for recognition. Prevention of forgeries in handwritten signatures has gain prominence in recent times. To serve this target this paper carried out Image Transformation techniques and an Artificial Intelligence model to effectively notice the differences of genuine and forged signature. Grass-fire transformations and optical flow captures the disparity in signatures. Proposed system uses Deep learning framework with ResNet 50 along with Convolutional Neural network (CNN). Comparative studies have been done using SVC2004 and SUSIG benchmark with the existing literature.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130057337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Exploring the Feasibility of Implementing Negative-Capacitance Tunnel-FET (NC-TFET) in Low-Power Digital Circuits 探索在低功耗数字电路中实现负电容隧道场效应管(NC-TFET)的可行性
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811449
S. Guha, Prithviraj Pachal
{"title":"Exploring the Feasibility of Implementing Negative-Capacitance Tunnel-FET (NC-TFET) in Low-Power Digital Circuits","authors":"S. Guha, Prithviraj Pachal","doi":"10.1109/VLSIDCS53788.2022.9811449","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811449","url":null,"abstract":"This paper attempts to highlight the circuit-level performance of negative-capacitance tunnel FET, when implemented in low-voltage (VDD) digital logic circuits. SILVACO TCAD is used to simulate the device and properly fitted with L-K calculated solution. The voltage amplification effect on the device current characteristics, corresponding to the ferroelectric gate layer has been suitably presented in this paper. Cadence Virtuoso has been utilized to implement various circuit level applications using NCTFET and suitably benchmarked with a conventional reference TFET (R-TFET). This paper presents the significant advantages gained by implementation of NCTFET in low power circuits.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127713335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Statistical Analysis of a Low Power Analog Current Source 低功率模拟电流源的统计分析
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811473
Sneha Upadhyay, Trisha Sau, S. Mitra, A. Bhowmik, S. Sarkhel, Soumya Pandit
{"title":"Statistical Analysis of a Low Power Analog Current Source","authors":"Sneha Upadhyay, Trisha Sau, S. Mitra, A. Bhowmik, S. Sarkhel, Soumya Pandit","doi":"10.1109/VLSIDCS53788.2022.9811473","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811473","url":null,"abstract":"This paper presents a low power PTAT(proportional to absolute temperature) current reference circuit, designed in 180nm scl technology and simulated using LTspice software. A resistor less circuit is designed to generate 1nA reference current(Iref) at a supply voltage(Vdd) of 0.44 V. Monte Carlo analysis of the circuit is performed with respect to two process parameters ,namely, oxide thickness(tox) and threshold voltage(vth). Individual variations as well as simultaneous variations of these parameters have been considered while analyzing the performance of the circuit. Statistical analysis, of the current values obtained, has been performed and the results have been verified through software like Python and SPSS (Statistical Package for the Social Sciences). At a later part of the project, Python automation is performed, where the LTspice software can be accessed and simulated without actually opening the software, but through Python codes.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114852006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis of Constant On-Time Buck Converter with System Verilog Real Number Model Approach 用系统Verilog实数模型方法分析恒时Buck变换器
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811446
Saikat RoyChowdhury, Sudeep Phadikar
{"title":"Analysis of Constant On-Time Buck Converter with System Verilog Real Number Model Approach","authors":"Saikat RoyChowdhury, Sudeep Phadikar","doi":"10.1109/VLSIDCS53788.2022.9811446","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811446","url":null,"abstract":"Constant On-Time buck converter with ripple injection architecture is proposed to improve efficient power conversion and voltage offset addition minimizes the overshoot with the improvement of poor light-load efficiency proposed by Zhou [6]. It can extend the battery life of some common application like smart camera, Point-of-load converter for laptops, etc. The simulation results show load regulation is maintained with 1% accuracy and maximum error (-6.25%) in switching period occurs at VIN = 4.25V, VOUT = 0.6V, FSW = 1.25MHz, ILOAD = 5A and significant amount of reduction in voltage deviation after enabling the control functions with proper load step-up and step-down, respectively. Output voltage ripple is within 17mV with Undershoot and Overshoot values across all combinations is under 34mV.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124526980","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Magnesium-Silicide (Mg2Si)/Silicon (Si) Heterojunction Based TFET for Optical Detection at 1550 nm 基于硅化镁(Mg2Si)/硅(Si)异质结的TFET在1550 nm的光学检测
2022 IEEE VLSI Device Circuit and System (VLSI DCS) Pub Date : 2022-02-26 DOI: 10.1109/VLSIDCS53788.2022.9811482
M. Khurana, Upasana, M. Saxena, Mridula Gupta
{"title":"Magnesium-Silicide (Mg2Si)/Silicon (Si) Heterojunction Based TFET for Optical Detection at 1550 nm","authors":"M. Khurana, Upasana, M. Saxena, Mridula Gupta","doi":"10.1109/VLSIDCS53788.2022.9811482","DOIUrl":"https://doi.org/10.1109/VLSIDCS53788.2022.9811482","url":null,"abstract":"In this work, a novel proposal of Magnesium-Silicide (Mg2Si)/Silicon (Si) Heterojunction based GeTFET for optical detection at 1550 nm has been offered where the merits of Mg<inf>2</inf>Si as source material and its performance both under dark and illumination has been discussed. Additionally, the source material engineering over GeTFET has been done with other low band gap materials such as Ge and SiGe and their performance has been compared with devices having Mg<inf>2</inf>Si and Si as source materials. The results reveal that in dark condition the proposed device i.e. Mg<inf>2</inf>Si based GeTFET outperforms other device designs i.e. with Si, Ge and SiGe in terms of high Ion (2.56×10<sup>-4</sup> A/µm), high I<inf>on</inf>-to-I<inf>off</inf> ratio (3.43×10<sup>11</sup>) at gate voltage of 1.0V and low threshold voltage (0.43V) at drain bias of 0.5V. As far as the optical performance is concerned, the proposed device with Mg2Si source material offers significantly higher sensitivity of 9.38×10<sup>7</sup> at such a low power of 10<sup>-4</sup> µW/µm<sup>2</sup> which is approximately 3 orders higher than other aforementioned materials. Moreover, the proposed architecture offers much better response and detection capability having responsivity of 8.8×10<sup>3</sup> A/W and detectivity 1.75×10<sup>16</sup> Jones at comparable low optical power density of 7×10<sup>-4</sup> µW/µm<sup>2</sup>.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128731945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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