{"title":"用系统Verilog实数模型方法分析恒时Buck变换器","authors":"Saikat RoyChowdhury, Sudeep Phadikar","doi":"10.1109/VLSIDCS53788.2022.9811446","DOIUrl":null,"url":null,"abstract":"Constant On-Time buck converter with ripple injection architecture is proposed to improve efficient power conversion and voltage offset addition minimizes the overshoot with the improvement of poor light-load efficiency proposed by Zhou [6]. It can extend the battery life of some common application like smart camera, Point-of-load converter for laptops, etc. The simulation results show load regulation is maintained with 1% accuracy and maximum error (-6.25%) in switching period occurs at VIN = 4.25V, VOUT = 0.6V, FSW = 1.25MHz, ILOAD = 5A and significant amount of reduction in voltage deviation after enabling the control functions with proper load step-up and step-down, respectively. Output voltage ripple is within 17mV with Undershoot and Overshoot values across all combinations is under 34mV.","PeriodicalId":307414,"journal":{"name":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analysis of Constant On-Time Buck Converter with System Verilog Real Number Model Approach\",\"authors\":\"Saikat RoyChowdhury, Sudeep Phadikar\",\"doi\":\"10.1109/VLSIDCS53788.2022.9811446\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Constant On-Time buck converter with ripple injection architecture is proposed to improve efficient power conversion and voltage offset addition minimizes the overshoot with the improvement of poor light-load efficiency proposed by Zhou [6]. It can extend the battery life of some common application like smart camera, Point-of-load converter for laptops, etc. The simulation results show load regulation is maintained with 1% accuracy and maximum error (-6.25%) in switching period occurs at VIN = 4.25V, VOUT = 0.6V, FSW = 1.25MHz, ILOAD = 5A and significant amount of reduction in voltage deviation after enabling the control functions with proper load step-up and step-down, respectively. Output voltage ripple is within 17mV with Undershoot and Overshoot values across all combinations is under 34mV.\",\"PeriodicalId\":307414,\"journal\":{\"name\":\"2022 IEEE VLSI Device Circuit and System (VLSI DCS)\",\"volume\":\"125 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-02-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE VLSI Device Circuit and System (VLSI DCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIDCS53788.2022.9811446\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE VLSI Device Circuit and System (VLSI DCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIDCS53788.2022.9811446","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis of Constant On-Time Buck Converter with System Verilog Real Number Model Approach
Constant On-Time buck converter with ripple injection architecture is proposed to improve efficient power conversion and voltage offset addition minimizes the overshoot with the improvement of poor light-load efficiency proposed by Zhou [6]. It can extend the battery life of some common application like smart camera, Point-of-load converter for laptops, etc. The simulation results show load regulation is maintained with 1% accuracy and maximum error (-6.25%) in switching period occurs at VIN = 4.25V, VOUT = 0.6V, FSW = 1.25MHz, ILOAD = 5A and significant amount of reduction in voltage deviation after enabling the control functions with proper load step-up and step-down, respectively. Output voltage ripple is within 17mV with Undershoot and Overshoot values across all combinations is under 34mV.
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