Salini Singh, Bhaskar Roy, M. A. Billaha, R. Dutta, S. K. Choudhary
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引用次数: 0
Abstract
Scaling down of device dimensions comes with both pros and cons which includes higher device density, lesser area requirement and increase in leakage contribution as well. This leakage sources limit the device scaling up-to certain dimensions but by introduction of multi gate Field Effect Transistors (FET) and use of different gate oxides, the device dimension can be tuned accordingly so that the leakage effects are minimized. Temperature plays a key role to affect the device performance as the size is reduced further. This paper deals with the effect on Fin-FET device performance for different gate oxides by varying the environment temperature from 273 K to 450 K.