部分耗尽绝缘体上硅(PDSOI) mosfet用于射频开关应用

Tara Prasanna Dash, C. K. Maiti, Devika Jena
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引用次数: 1

摘要

RF-SOI系统的行业标准目前是部分耗尽绝缘体上硅的mosfet。衬底损耗、串扰和非线性是在硅基技术中创建高性能射频集成电路的最大障碍。几个关键参数,如RON、COFF、击穿电压和多个mosfet堆叠上的RF电压分布(平衡)是RF开关应用的关键性能值(FOM)。在这项工作中,进行了预测TCAD建模和仿真,以分析线后端过程的作用和基片的电磁特性对射频开关性能的影响。详细分析了关键参数在多个场效应管堆叠中的作用。讨论了各种SOI MOSFET效应的后果及其对射频开关应用的影响。所讨论的方法和仿真框架可能对其他类似RF CMOS技术中的RF开关设计有用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Partially Depleted Silicon-on-Insulator (PDSOI) MOSFETs for RF Switching Applications
The industry standard for RF-SOI systems is presently Partially Depleted silicon-on-insulator MOSFETs. Substrate losses, crosstalk, and non-linearities are the biggest obstacles to creating high-performance RF ICs in Si-based technology. Several critical parameters like RON, COFF, breakdown voltage, and RF voltage distribution (balance) across a stack of several MOSFETs are the key figures-of-merit (FOM) for RF switch applications. In this work, predictive TCAD modeling and simulations are performed to analyze the role of the back-end of line process and the electromagnetic properties of the substrate that influence the performance of RF switches. The role of key parameters across a stack of several FETs is analyzed in detail. The consequences of various SOI MOSFET effects and their impact on RF switch applications are discussed. The methodology and simulation framework discussed may be useful for the design of RF switches in other similar RF CMOS technologies.
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