K. Kohama, Kazuhiro Ito, K. Mori, K. Maekawa, Y. Shirai, M. Murakami
{"title":"Growth analysis of self-formed Ti-rich interface layers in Cu(Ti)/dielectric-layer samples using Rutherford Backscattering Spectrometry","authors":"K. Kohama, Kazuhiro Ito, K. Mori, K. Maekawa, Y. Shirai, M. Murakami","doi":"10.1109/IITC.2009.5090372","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090372","url":null,"abstract":"For systematic investigation of growth of the Ti-rich interface layers in the annealed Cu(Ti)/dielectric-layer, the RBS technique was employed. Growth behavior observed in RBS was similar to that in TEM. Thus, the RBS technique is indicated to be an appropriate method for the growth analysis of the Ti-rich interface layers.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"1155 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115889106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"TSV-aware interconnect length and power prediction for 3D stacked ICs","authors":"Daehyun Kim, S. Mukhopadhyay, S. Lim","doi":"10.1109/IITC.2009.5090331","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090331","url":null,"abstract":"In this paper, we present a new 3D wirelength distribution model which considers the contribution of through-silicon-via (TSV) on wirelength, die area, and power consumption. Since TSVs occupy the device layer together with active devices, the die area increases if TSVs are utilized. This area overhead, which in turn affects the wirelength, worsens due to the large size of TSVs themselves, which is shown to be as large as logic gates themselves. Moreover, the capacitive coupling among TSVs and wires cause non-negligible amount of parasitic capacitance, which worsens power consumption. We present and validate a new 3D wirelength distribution and power consumption model to correctly model the various impacts of TSV.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"237 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121628087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hsien-Wei Chen, S. Jeng, H. Tsai, Yu-Wen Liu, Hsiu-Ping Wei, Douglas C. H. Yu, Y. Sun
{"title":"A self-aligned airgap interconnect scheme","authors":"Hsien-Wei Chen, S. Jeng, H. Tsai, Yu-Wen Liu, Hsiu-Ping Wei, Douglas C. H. Yu, Y. Sun","doi":"10.1109/IITC.2009.5090367","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090367","url":null,"abstract":"A new air-gap interconnect scheme with no additional patterning step successfully resolves the issue of unlanded via, and provides good interconnect reliability and improved packaging margin. We demonstrate that the insertion of airgaps in a very low-k dielectric (k=2.5) reduces the RC value of a 0.07um/0.07um comb structure by ∼14%, which is equivalent to an effective dielectric constant about 2.2.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122630156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Thompson, S. Ogawa, L. Stern, L. Scipioni, J. Notte
{"title":"A novel helium ion microscope for interconnect material imaging","authors":"W. Thompson, S. Ogawa, L. Stern, L. Scipioni, J. Notte","doi":"10.1109/IITC.2009.5090342","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090342","url":null,"abstract":"The recently developed helium ion microscope (HIM) can be operated in three imaging modes; ion induced secondary electron (SE) mode, Rutherford Backscatter imaging (RBI) mode, and scanning transmission ion imaging (STIM) mode. When low k dielectric or copper interconnects are imaged in these modes, it was found that unique pattern dimension and fidelity information at sub-nanometer resolution is available for the first time. This paper will discuss the helium ion microscope architecture and the imaging modes that may make it a tool of particular value to the low-k dielectric and dual damascene copper interconnect technology.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121163807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Determination of the impact of field enhancement in low-k dielectric breakdown","authors":"M. Bashir, L. Milor","doi":"10.1109/IITC.2009.5090353","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090353","url":null,"abstract":"Test structures have been designed to detect the impact of field enhancement on low-k dielectric breakdown at the tips of combs in comb structures. An analysis methodology has been proposed to separate the impact of area and field enhancement. Modeling utilizes characteristic lifetimes at various area ratios. The proposed model, when compared with direct fitting of the Weibull distribution, improves lifetime estimates by 2.5 orders of magnitude at 0.01% and reduces variance of the confidence bound by 73%.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116105649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Kudo, M. Haneda, T. Tabira, M. Sunayama, N. Ohtsuka, N. Shimizu, K. Yanai, H. Ochimizu, A. Tsukune, H. Matsuyama, T. Futatsugi
{"title":"Copper wiring encapsulation at semi-global level to enhance wiring and dielectric reliabilities for next-generation technology nodes","authors":"H. Kudo, M. Haneda, T. Tabira, M. Sunayama, N. Ohtsuka, N. Shimizu, K. Yanai, H. Ochimizu, A. Tsukune, H. Matsuyama, T. Futatsugi","doi":"10.1109/IITC.2009.5090384","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090384","url":null,"abstract":"The semi-global level is rather different from the intermediate level in terms of wiring scale and types of interlayer dielectrics, which has an impact on the encapsulation capability of MnO. The difference in both levels, therefore, requires major changes of the processes such as the deposition conditions of CuMn seed and capping film. We successfully enhanced wiring and dielectric reliability at the semi-global level as well as at the intermediate level in 45-nm-node technology. For electromigration and dielectric stability, MnO segregated along the outline of the Cu wiring increases activation energy and voltage acceleration factor by 54 and 47%, respectively. These increases effectively enhance the maximum current density and the expected interlayer dielectric lifetime by factors of 28 and 70, compared to those of a control sample.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127126362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Jang, B. Kim, T. Matthias, S. Hyun, H. Lee, Y. Park
{"title":"Effect of wet pre-treatment on interfacial adhesion energy of direct Cu-Cu bond","authors":"E. Jang, B. Kim, T. Matthias, S. Hyun, H. Lee, Y. Park","doi":"10.1109/IITC.2009.5090375","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090375","url":null,"abstract":"Cu and Ti films were deposited by sputtering on thermally oxidized Si wafers and then the deposited films were bonded by direct Cu-Cu thermo-compression bonding for evaluating the effect of the wet pre-treatment on the interfacial adhesion energy. The interfacial adhesion energy was evaluated as 0.29, 1.28, 1.64, 1.17, and 0.42 J/m2 by acetic acid pre-treatment at 35°C for 0, 1, 5, 10, and 15 min. The existence of optimum wet pretreatment time seems to be related to the film thickness effect as well as the surface oxide removal effect.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129840245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Torazawa, T. Hinomura, K. Mori, Y. Koyama, S. Hirao, E. Kobori, H. Korogi, K. Maekawa, K. Tomita, H. Chibahara, N. Suzumura, K. Asai, H. Miyatake, S. Matsumoto
{"title":"Effects of N doping in Ru-Ta alloy barrier on film property and reliability for Cu interconnects","authors":"N. Torazawa, T. Hinomura, K. Mori, Y. Koyama, S. Hirao, E. Kobori, H. Korogi, K. Maekawa, K. Tomita, H. Chibahara, N. Suzumura, K. Asai, H. Miyatake, S. Matsumoto","doi":"10.1109/IITC.2009.5090356","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090356","url":null,"abstract":"RuTa(N) film has been prepared by doping N in Ru-Ta alloy and investigated its use as a barrier layer against Cu diffusion in Cu interconnects. It was found that RuTa(N) has a poor barrier property against Cu in the BEOL process, since N in Ru-Ta alloy is desorbed and RuTa(N) is recrystallized by heat treatment. It was also shown that RuTa(N) has inferior reliability due to its poor wettability with Cu compared to RuTa. On the other hand, RuTa has both good barrier property and superior reliability performance. It is possible to apply RuTa single film as a barrier layer for Cu interconnects.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131714701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Sillon, D. Henry, J. Souriau, J. Brun, H. Boutry, S. Chéramy
{"title":"New trends in wafer level packaging","authors":"N. Sillon, D. Henry, J. Souriau, J. Brun, H. Boutry, S. Chéramy","doi":"10.1109/IITC.2009.5090390","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090390","url":null,"abstract":"We present in this paper the two generic integration schemes developed at Leti, aiming to address two opposite industrial needs. The first scheme, based on TSV free Via Belt technology, allows wafer level integration of highly heterogeneous systems taking into account different technologies, wafer and die sizes and mainly targets enduser companies looking for generic technologies. The second one, based on TSV WLP and active silicon interposer, mainly addresses the IDMs needs. Main technological bricks related to both schemes are presented and validated through specific demonstrators.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134448761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Byeol Han, K. Park, Kwangchol Park, J. Park, Won-Jun Lee
{"title":"Atomic layer deposition of copper thin film using CuII(diketoiminate)2 and H2","authors":"Byeol Han, K. Park, Kwangchol Park, J. Park, Won-Jun Lee","doi":"10.1109/IITC.2009.5090379","DOIUrl":"https://doi.org/10.1109/IITC.2009.5090379","url":null,"abstract":"We report for the first time the atomic layer deposition (ALD) of Cu film using alternating exposures to Cu<sup>II</sup>(diketoiminate)<inf>2</inf> and H<inf>2</inf>. The influences of deposition temperature on the properties of the deposited film were investigated at 140–220°C. Minimum sheet resistance and continuous film surface on Pt substrate were obtained at 180–200°C. The resistivity of 17-nm-thick ALD Cu film was ∼7 µΩ·cm.","PeriodicalId":301012,"journal":{"name":"2009 IEEE International Interconnect Technology Conference","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115706847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}