K. Hu, Xiao-Dan Guo, Zhiqingg Zhou, Mian Zhang, Guangpin Li, Xiukun He
{"title":"Effect of deep levels on the photo-sensitivity in GaAs substrate and MESFET device","authors":"K. Hu, Xiao-Dan Guo, Zhiqingg Zhou, Mian Zhang, Guangpin Li, Xiukun He","doi":"10.1109/ICSICT.1995.503337","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503337","url":null,"abstract":"Deep levels in SI-GaAs substrate, ion implantation layer and MESFET device have been investigated by photo-stimulated current measurement system (PSCS) using illumination in range of 700 nm to 3500 nm. It shows that there exists an absorption peak (1.42) and 1.20, 0.70, 0.48 eV deep levels in both SI-GaAs substrate, ion implantation layer and MESFET device. These deep levels have effect on the photosensitivity of the devices. These deep levels perhaps originate from SI-GaAs substrate which also has these levels. The way to decrease the photosensitivity in the device is discussed according to the result.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133919936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Dynamic trapping model for analysis of GaAs MESFETs and quantum well lasers","authors":"Zhiping Yu, R. Dutton, W. Harrison, Yi Liu","doi":"10.1109/ICSICT.1995.499769","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.499769","url":null,"abstract":"A numerically efficient, dynamic trapping model has been developed for semiconductor device simulation. All analysis modes-dc, ac, and time transient-are available for full account of the trap effects on the device characteristics. The application of this model to the simulation of GaAs MESFETs reveals several important mechanisms responsible for the sidegating effect which deteriorates the circuit performance of MESFETs. A quantitative agreement between the simulation and experiment results is achieved. With equivalent trapping parameters (e.g. capture and emission cross sections) calculated from the quantum mechanical analysis, the model can be extended to describe the carrier transition among discrete eigen-energy levels in and transport across the quantum well region in quantum well lasers. An example of the quantum well laser analysis is given.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134006346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Plettner, K. Haberger, A. Englmaier, H. Hartmann
{"title":"High speed interconnects on SOI substrates","authors":"A. Plettner, K. Haberger, A. Englmaier, H. Hartmann","doi":"10.1109/ICSICT.1995.503342","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503342","url":null,"abstract":"A buried and highly conductive layer beneath the silicon surface is used to improve the shielding of the interconnects and to facilitate the transmission of high speed signals. The technology is based on the Bonded Etch-back Silicon On Insulator (BESOI) technique. No additional mask level is required and design freedom is hardly limited.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134392948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Characteristics of ultrathin dielectric films (<5 nm) grown or annealed in a nitric oxide ambient using rapid thermal processing","authors":"Z. Yao, H. B. Harrison, S. Dimitrijev, Y. Yeow","doi":"10.1109/ICSICT.1995.499640","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.499640","url":null,"abstract":"In this paper we report on the physical properties, such as thickness measurements and XPS depth profiles, and electrical properties of NO-grown gate dielectrics and compare them with films of similar thicknesses grown in N/sub 2/O and O/sub 2/. The interface state densities, interface state generation rate during electrical stress, charge trapping properties and stress induced leakage current are presented. In addition, electrical and physical properties of NO-annealed oxides which had an initial oxide and then were annealed in nitric oxide are included.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134511577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design and research of V-groove silicon avalanche electron emission array","authors":"Dazhong Zhu","doi":"10.1109/ICSICT.1995.503323","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503323","url":null,"abstract":"A V-groove structure is used to fabricate a silicon avalanche cathode (SAC). This novel structure for a SAC has a planar electron emission surface topology which reduces the channel current crowding effect and the current punch-through effect. The device structure and fabrication processing are described. A simple series resistance model and an effective electron emission area model are also discussed. A 12/spl times/12 cells arrayed device of this structure is designed and fabricated. Its I-V characteristics and emission characteristics are investigated, producing a better result than that of the traditional structure SAC.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115623102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Optical characteristics of erbium doped AlGaAs-GaAs heterostructures","authors":"Dahua Zhang, T. Zhang, R. Kolbas, J. Zavada","doi":"10.1109/ICSICT.1995.503332","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503332","url":null,"abstract":"Erbium (Er) doped AlGaAs-GaAs multiple quantum well heterostructures have been grown by molecular beam epitaxy and optically characterized using photoluminescence. It was found that the Er/sup 3+/ luminescence of the MQW structures with Er doped GaAs quantum wells and undoped Al/sub x/Ga/sub 1-x/As barriers was strongly dependent on the Al composition. This result suggests that the prolonged carrier lifetime in the barriers, where the X band is lower in energy than the /spl Gamma/ band, improves the energy transfer from the host semiconductor to the Er/sup 3+/ ions. Emission intensity versus excitation power measurements were also performed and data indicate that a high efficiency of energy transfer can be achieved by incorporating Er in MQW heterostructures.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116059891","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Yue, J. Liou, A. Ortiz-Conde, F. Garcia Sanchez
{"title":"Modeling high-level free carrier injection in advanced bipolar junction transistors","authors":"Y. Yue, J. Liou, A. Ortiz-Conde, F. Garcia Sanchez","doi":"10.1109/ICSICT.1995.503554","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503554","url":null,"abstract":"This paper presents a comprehensive study on the effects of high-level free-carrier injection on the current transport of bipolar junction transistors (BJTs). Detailed information for the free-carrier concentration, electric field, and drift and diffusion current components in the quasi-neutral base (QNB) under high-level injection are calculated using the modified ambipolar transport equation and using several different approximations for the majority-carrier current in the QNB. Our results suggest that the widely used zero majority current approximation gives rise to a larger error compared to other lesser known approximations.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123545309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A thermal field oxidation process for ionizing radiation hardness","authors":"Yuanfu Zhao, Yuhong Hu, Rongliang Yan, Guoqiang Zhang, Diyuan Ren","doi":"10.1109/ICSICT.1995.503384","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503384","url":null,"abstract":"A thermal field oxidation process for ionizing radiation hardness has been described. It is shown that the failure threshold of 54HC04, in which the hardened thermal field process has been applied, is excess to 1/spl times/10/sup 6/rad(Si).","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123921021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Process-related instability mechanisms for the hydrogenated amorphous silicon thin film transistors","authors":"Y. Tai, F. Su, M. Feng, H.C. Cheng","doi":"10.1109/ICSICT.1995.503542","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503542","url":null,"abstract":"Thin film transistors (TFTs) with various hydrogen concentrations in the amorphous silicon (a-Si:H) films and different silicon nitride (SiN/sub x/) gate compositions have been stressed with dc bias to realize the process-related device reliability. For the positive gate bias stress, the instability phenomena mainly come from the electron trapping in the SiN/sub x/. On the other hand, for the negative gate bias stress, the hydrogen-enhanced state creation in the a-Si:H films due to the defect pool effect will be offset by the hole trapping in the SiN/sub x/. Consequently, the reliability of the TFTs was improved by using the SiN/sub x/ gates with less trap sites and reducing the hydrogen concentration in the a-Si:H films,.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125197104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Sicard, J. Huang, J. Fourniols, A. Ferreira, J. Noullet
{"title":"Experiments in sub-micron CMOS technology: the JISI project","authors":"E. Sicard, J. Huang, J. Fourniols, A. Ferreira, J. Noullet","doi":"10.1109/ICSICT.1995.500157","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.500157","url":null,"abstract":"This paper describes a set of micro-electronics experiments implemented in a 0.7 /spl mu/m CMOS integrated circuit used for the training of graduate students. A set of 10 experiments are implemented on the chip and include basic devices such as MOS transistors, diodes, and silicon sensors, as well as design oriented experiments (complex gates, latches) and analog experiments (operational amplifiers, crosstalk sensors, voltage controlled oscillators). The chip, named JISI has been fabricated in various CMOS technologies for performance evaluation with the technology scaling down.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126379690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}