2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)最新文献

{"title":"Dual port SRAM read-disturb-write mechanism and design for test","authors":"R. Lo, S. Lu, Jordan Hsu, Quincy Li","doi":"10.23919/ISSM.2017.8089088","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089088","url":null,"abstract":"Dual Port (DP) needs asynchronous clock skew test to screen out read-disturb-write during simultaneous row access from both ports. We will explain read-disturb-write failure mechanism from simulation and Si. The BL clamped design and longer write word-line-pulse scheme can improve DP Vmin. 2D adaptive shmoo is also proposed to reduce test time.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130542114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Understanding and controlling wafer surface contamination at wafer level chip scale package — Wiljelm Carl K. Olalia","authors":"Kristine B. Bongat","doi":"10.23919/ISSM.2017.8089087","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089087","url":null,"abstract":"In a semiconductor manufacturing processes such as Wafer Level Chip Scale Package, yield is one of the Key Performance Indicator. Yield is also an indicator for Quality, Productivity and OEE. If the yield is below the limits or cut-off, it said to be that there is a sign of poor quality since the process is rejecting Wafer or Dice affected by different defects either by Electrical or by Visual Mechanical. One of the ON's Key Customer Expectation Requirements in terms of Product Quality is “Zero Defects”. There is an equivalent cost for each poor quality computed by number of dice or ppm. In terms of Productivity, Low Yield product is being hold at the process before moving the lot to next process or shipping out. The additional time required to Engineer on analyzing the problem resulted to longer cycle time or queuing. ON's Key Customer Expectation Requirements in terms of Service is 90–100% On Time Delivery. Lastly, for the OEE, definitely low yield will directly affect the overall equipment efficiency since one of the parameter when computing the OEE is the Good Parts from the product on top of the Ideal Cycle Time and Earned Hours from the Master Plan. To conclude, improving the yield will also improve the Quality, Productivity and Cycle Time.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116493081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Target and uniformity controls of WLP in SSL/LED manufacturing","authors":"K. Hui, K. Chen, Simon Chang, Y. C. Lu, Leo Ke, S. Sheen","doi":"10.23919/ISSM.2017.8089097","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089097","url":null,"abstract":"Advanced process controls (APC) have been ubiquitously applied to the manufacturing processes of semiconductor devices for over two decades by now. Reports on its successful applications to the makings of light-emitting diodes (LED) in the solid-state lighting (SSL) industry however are comparatively less well documented in the literature [1-4]. The concluding remark in [1], ‘…APC is not yet reality … on the right track ….’ precisely summarizes the current state and difficulties of actual practices in reality.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131502166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The productivity opportunities by applying machine learning algorithms in a fab","authors":"C.Y. Lai, P. Tsai, S. Chang, Y.C. Wang, L.W. Teng","doi":"10.23919/ISSM.2017.8089089","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089089","url":null,"abstract":"Machine learning has become a ubiquitous and essential part of business operations. Amazon uses algorithms to nudge their customers to purchase a product they might like. Given a purchase history for a customer and a large inventory of products, identify those products in which that customer will be interested and likely to purchase. A model of this decision process would allow a computer to make recommendations to a customer and motivate product purchases. Machine learning solves problems that cannot be solved by numerical means alone. These algorithms can not only increase an enterprise's internal efficiency, but machine learning algorithms also be used to deepen consumer loyalty. That is to say, machine learning provides potential solutions in all these domains and more, and is set to be a pillar of our future civilization. Of course, machine learning is also very important in a fab because it could help us solve problems including defects selection, image detection, fabrication scheduling rule, and so on. Machine learning builds heavily on statistics. When we train our machine model to learn, we have to give it a statistically representative sample as training data. If the training set isn't representative, we run the risk of the machine learning patterns that are not complete. Then, if the training set is too small, we won't learn enough and may even reach inaccurate conclusions.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"338 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124750574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Safety shutdown of process equipment by automatic remote operation — Kuniaki Ishimoto","authors":"Takeshi Watanabe, Hidenori Tanaka, M. Arinaga, Yasunori Fuchikami","doi":"10.23919/ISSM.2017.8089105","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089105","url":null,"abstract":"Japan Semiconductor Corporation (JSC) has been mainly manufacturing 8inch product wafers at 2 facilities, located at Iwate and Oita in Japan (Figure1). At present, both operations are sharing 80% or more of the processes(Figure2). Furthermore, we are advancing the improvement of both facility and production equipment in order to achieve “PGA 500Gal”. ∗PGA : peak ground acceleration.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122010784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The application of TRIZ algorithm solve the problem of byproduct Hsin, Yi-Fang","authors":"Chen Guan-ting, Chou Ming-Kuan, Huang Kuo-Chan, Lu Chien-Hui, Tseng Yun-Chieh, Chao Chia-chi","doi":"10.23919/ISSM.2017.8089086","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089086","url":null,"abstract":"The research used TRIZ innovation methodology which included the model of the technical contradictions, physical contradictions, and the inventive theory of asymmetry — preliminary action · nesting — extraction principles, to optimize the design and improve the Lamp anneal process of diffusion machine. The inventive embodiment consisted of the following four parts as: 1. Add the wafer Pre-clean step, 2. Change the design of blowing ports, 3. Change the design of air inlet, 4. Adjust the structure of the chamber (Figure 5). Above part 2–3 are key inventions to be implemented and will change the air flow to reduce the adhersion of vaporized byproduct completedly. Part 1 & 4 are optional to improve the reduction of adhersion more effectively. In addition, the simulation of airflow rate distribution manifested that the distribution of flow velocity could be changed and produced a gradually higher speed airflow from the top to the bottom. The out-gassing of the wafer near the backside could be expelled by the airflow of lower area while keeping original airflow distribution of upper area. The invention reduced the probability of vaporized byproduct adhering to the quartz and lessen the wafer surface thermal effect, so that the process reached stability and machine up-time was soaring.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121500937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A practical flow regarding 2nd party audit on quality proficiency in supplier management — Chien-Hui Lu","authors":"D. Chen, Wei-Fu Chang","doi":"10.23919/ISSM.2017.8089106","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089106","url":null,"abstract":"In October 2016, the IATF published a revised automotive industry standard, and the first edition will be referred to as “IATF 16949.” IATF 16949 is aligned with and refers to the most recent standard, ISO 9001:2015, fully respecting its structure and requirements. According to the IATF 16949, the goal of this standard is the development of a quality management system that provides for continual improvement, emphasizing defect prevention, and the reduction of variation and waste in the supply chain. IATF 16949 adds additional requirements for both first and second-party auditors and also outlines the minimum competencies for auditors, which include: 1. Automotive process approach for auditing, including risk-based thinking, 2. Applicable core tools requirements, 3. Applicable customer-specific requirements.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128609470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Real-Time resource allocations and shceduling of product-mix production systems with multi-type jigs","authors":"S. Arima, Huizhen Bu, Yutaka Akiyama, Hiroyuki Motomiya","doi":"10.23919/ISSM.2017.8089104","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089104","url":null,"abstract":"This paper introduces an integration method for a multi-type resource allocation problem (MRAP) and Product-mix scheduling problems (PMSPs) in real-time. Particularly, SAR2 (Simultaneous Allocation based on Resource-Ratio) is used as high-speed heuristic approach for the MRAP, and an real-time scheduling method using optimal production cycle (OPC) is used in the scheduling to maximize the resource utilization while keeping a due date and Q-time restrictions of every production lot. As the result of performance evaluations in an actual wafer test process, the proposed method improved both the due-date satisfaction by 24.4–26.2% and standard deviation of tool utilization by 13–16%. The computational time was short enough for a real-time control even by using a standard personal computer.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116090978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A novel method of WTW for productivity improvement — Stephen Tseng","authors":"J. Kung, Y. Hsu, James Lin, C. W. Yang, N. S. Shen","doi":"10.23919/ISSM.2017.8089102","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089102","url":null,"abstract":"In order to improve tool productivity in semi-conductor manufacturing, we come up with this work reporting a combination of Wait Time Waste (WTW) and Hidden Capacity Diagnostic (HCD) analysis methodology to extract the wafer process information from tool log via SEMI standard and SECS data to do visualization analysis. Thereafter, it is easier to find opportunity to reduce unnecessary process waste time and tool abnormality.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125489137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"To improve the measure fail rate On SEM through six sigma DMAIC methodology — Chien-Hui Lu","authors":"Ricky Lu, C. Chao, Yi Cheng","doi":"10.23919/ISSM.2017.8089095","DOIUrl":"https://doi.org/10.23919/ISSM.2017.8089095","url":null,"abstract":"A Critical Dimension SEM (CD-SEM: Critical Dimension Scanning Electron Microscope) is a dedicated system for measuring the dimensions of the fine patterns formed on a semiconductor wafer. CD-SEM is mainly used in the manufacturing lines of electronic devices of semiconductors. The measurement process includes OM Alignment, SEM Alignment, Addressing, Measurement, and Image Saved. From May 2015, we found CD-SEM measure fail rate (measured by S-9380 SEM) is too high (its point reject rate is 46.13%). High measure fail rate will reduce the equipment capacity utilization, and increase manufacturing costs. So, we apply six-sigma DMAIC methodology to improve CD SEM fail rate that is our primary task, this is big Y. According to entitlement rules, we make a target to improve CD SEM fail rate from 46.13% to 15.4%. Drilling down CD SEM fail ERR (Error code reject rate) and analyze the data, the most of measurement errors are in addressing code (9007) =43.731%. We choice addressing code (9007) improvement as our small y. To improve this problem, the Six Sigma approach of DMAIC (Define, Measure, Analyze, Improve, Control) is deployed on this project. There are several tools applied in this process improvement, such as SIPOC, Detailed Map, Cause & Effect Matrix analysis, ANOVA, and DOE. Initial investigation indicates several factors in addressing of Photo process contribute this measurement fail phenomenon. By Cause & Effect Matrix, several factors are clarified as most possible root causes, they are X1:Magnification, X2: Algorithm, X3: Kind, and X4: Method. After the statistical comparisons, X1: Magnification and X4: Method are significant & important factors. DOE is conducted to figure out the optimized process control conditions and the results showed significant difference from original conditions. With such implementation, the CE-SEM measurement fail rate is improved from 46.13% to 1%. The total benefits lead to 39 million cost saving! It is a good practice to proceed continuously the quality improvement with Six Sigma Methodology for other defect improvement in the future.","PeriodicalId":280728,"journal":{"name":"2017 Joint International Symposium on e-Manufacturing and Design Collaboration (eMDC) & Semiconductor Manufacturing (ISSM)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133808905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}