IEEE Custom Integrated Circuits Conference 2006最新文献_第4页

Modeling, Design, and Verification for the Analog Front-end of a MEMS-based Parallel Scanning-probe Storage Device 基于mems的并行扫描探针存储设备模拟前端的建模、设计和验证

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320886

C. Hagleitner, A. R. Bonaccio, H. Rothuizen, D. Wiesmann, J. Lienemann, J. Korvink, G. Cherubini, E. Eleftheriou

引用次数: 4

A 1.8-V 22-mW 10-bit 30-MS/s Subsampling Pipelined CMOS ADC 一个1.8 v 22mw 10位30ms /s次采样流水线CMOS ADC

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320895

J. Li, Xiao-Qing Zeng, Lei Xie, Jun Chen, Jianyun Zhang, Yawei Guo

引用次数: 20

Silicon Integrated Circuits Incorporating Antennas 集成天线的硅集成电路

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320824

K. O. Kenneth, Kihong Kim, B. Floyd, J. Mehta, H. Yoon, C. Hung, D. Bravo, T. Dickson, Xiaoling Guo, Ran Li, N. Trichy, J. Caserta, W. Bomstad, J. Branch, Dong-Jun Yang, J. Bohorquez, Jie Chen, E. Seok, J. Brewer, Li Gao, A. Sugavanam, Jau-Jr Lin, Y. Su, C. Cao, M. Hwang, Yanping Ding, Zhenbiao Li, S.-H. Hwang, H. Wu, S. Sankaran, N. Zhang

引用次数: 6

A 70-GHz Effective Sampling Rate On-Chip Oscilloscope with Time-Domain Digitization 70 ghz有效采样率时域数字化片上示波器

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320964

M. Safi-Harb, G. Roberts

引用次数: 1

A Quadrature Demodulator for WCDMA Receiver Using Common-Base Input Stage with Robustness to Transmitter Leakage 一种对发射机泄漏具有鲁棒性的共基输入级WCDMA接收机正交解调器

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1093/ietele/e90-c.6.1241

T. Mitomo, O. Watanabe, R. Fujimoto, S. Kawaguchi

引用次数: 2

A Multi-Standard Low Power 1.5-3.125 Gb/s Serial Transceiver in 90nm CMOS 90nm CMOS多标准低功耗1.5-3.125 Gb/s串行收发器

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320970

David A. Yokoyama-Martin, K. Krishna, J. Stonick, Aaron Caffee, E. K. Gamble, Chris Jones, J. Mcneal, J. Parker, Ross Segelken, J. Sonntag, K. Umino, J. Upton, D. Weinlader, Skye Wolfer

引用次数: 6

Low-Voltage Universal Cell (LVUC): A Compact Analog/Digital Logic Block for Mixed Signal FPGAs 低压通用单元(LVUC):用于混合信号fpga的紧凑模拟/数字逻辑块

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320936

L.M. Kalyani-Garimella, A. Garimella, J. Ramírez-Angulo, R. Carvajal, A. López-Martín

引用次数: 1

First-Harmonic Injection-Locked Ring Oscillators 一谐波注入锁环振荡器

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320927

B. Mesgarzadeh, A. Alvandpour

引用次数: 30

A Scalable ET2RAM (SETRAM) with Verify Control for SoC Platform Memory IP on SOI 可扩展ET2RAM (SETRAM)，具有SOI上SoC平台内存IP的验证控制

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.321008

K. Arimoto, F. Morishita, I. Hayashi, T. Tanizaki, T. Ipposhi, K. Dosaka

{"title":"A Scalable ET2RAM (SETRAM) with Verify Control for SoC Platform Memory IP on SOI","authors":"K. Arimoto, F. Morishita, I. Hayashi, T. Tanizaki, T. Ipposhi, K. Dosaka","doi":"10.1109/CICC.2006.321008","DOIUrl":"https://doi.org/10.1109/CICC.2006.321008","url":null,"abstract":"We had reported TTRAM (Morishita, 2005) and ET2RAM (Arimoto, 2006) which are high-density capacitor-less SOI-CMOS compatible memory IP's. A platform design methodology becomes the main stream in SoC world because the system integration progress and complexity requires the implementation of many lands of IP's and induces the longer design turn around time and design cost up. This time, we have up-graded ET2RAM with scalable function named SETRAM (scalable enhanced twin-transistor RAM). This memory IP can be applied to the many kinds of applications by the verify control technique with compact ABC (automatic body control) sense amplifier. The scalable functions are, for example, 263MHz high speed random cycle memory to replace the high density on chip SRAM, 79mW/4Mb lower active power dissipation for mobile application, 453MHz data transfer of page/burst mode for cache memory and graphics memory applications and lower stand-by current mode of 5 sec data retention time. These are also supported as the programmable functions. The SETRAM can provide the scalable memory IP's in SoC platform on SOI devices and can improve the performance of many future applications","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134122161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

OFDM modulator with digital IF and on-chip D/A-converter 带有数字中频和片上D/ a转换器的OFDM调制器

IEEE Custom Integrated Circuits Conference 2006 Pub Date : 2006-09-01 DOI: 10.1109/CICC.2006.320907

J. Lindeberg, Olli Väänänen, J. Pirkkalaniemi, M. Kosunen, K. Halonen

引用次数: 3