低压通用单元(LVUC):用于混合信号fpga的紧凑模拟/数字逻辑块

L.M. Kalyani-Garimella, A. Garimella, J. Ramírez-Angulo, R. Carvajal, A. López-Martín
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引用次数: 1

摘要

报道了一种高度通用的模拟/数字/神经可配置逻辑块(LVUC),用于下一代混合信号现场可编程门阵列。该单元是一种真正通用的构建模块,非常紧凑,具有低功耗,低电压要求,并且可以使用轨道到轨道的模拟和数字信号。它可以很容易地配置为数字,模拟,模拟到数字,数模到模拟和神经可配置块。实验结果表明,所提出的电池在低至1.4V的单电源轨对轨信号下工作
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low-Voltage Universal Cell (LVUC): A Compact Analog/Digital Logic Block for Mixed Signal FPGAs
A highly versatile general purpose analog/digital/ neural configurable logic block (LVUC) for utilization in the next generation of mixed signal field programmable gate arrays is reported. The cell is a truly universal building block, very compact and has low power, low voltage requirements and operates with rail-to-rail analog and digital signals. It can be easily configured to perform as a digital, analog, analog to digital, digital to analog and neural configurable block. Experimental results of a fabricated test chip are presented that validate the proposed cell operating with rail-to-rail signals from a single supply as low as 1.4V
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