2005 13th International Conference on Advanced Thermal Processing of Semiconductors最新文献_第3页

Long pulse laser thermal processing: annealing duration trade-off for next generation semiconductor hot processes 长脉冲激光热加工:下一代半导体热加工的退火时间权衡

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613691

J. Venturini

{"title":"Long pulse laser thermal processing: annealing duration trade-off for next generation semiconductor hot processes","authors":"J. Venturini","doi":"10.1109/RTP.2005.1613691","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613691","url":null,"abstract":"Not only laser annealing is an alternative to classical furnace thermal processes, but today laser thermal processing (LTP) appears very suitable for various processes of various materials of the semiconductor industry. The duration of the laser pulse heating the material to be annealed needs to be short enough to induce both nm-scale localized and metastable thermodynamic cycles (ns to mus range) but long enough to avoid too high degree of superheating regime responsible for damage or cancellation of the annealing process. We gather in this paper the main results found in both theoretical and experimental literature comparing the effect of the heating pulse duration on the effectiveness of the annealing. Simulation calculations highlight the added value brought by the relatively long thermal cycle induced by a long-duration laser pulse in either defects curing or activation of electrical dopants. Electrical properties measured on real device structures from ultra-shallow junction annealed by a long pulse-LTP confirm the potential of a 200 ns-duration excimer laser irradiation for dopant activation in sub-45 nm CMOS manufacturing","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129109423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Rad-Pro: effective software for modeling radiative properties in rapid thermal processing Rad-Pro:快速热加工中辐射特性建模的有效软件

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613719

B. Lee, Z.M. Zhang

引用次数: 11

Green laser annealing with light absorber 带光吸收器的绿色激光退火

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613689

K. Shibahara, A. Matsuno, E. Takii, T. Eto

引用次数: 4

Synthesis and control of ultra thin gate oxides for the 90 and 65 nm nodes 90和65 nm节点超薄栅极氧化物的合成与控制

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613681

J. Shepard, A. Chou, M. Chudzik, C. Collins, M. Freiler, Wei He, P. Kirsch, A. Loebl, R. Mo, P. Ronsheim, E. Rottenkolber, Wenjuan Zhu

{"title":"Synthesis and control of ultra thin gate oxides for the 90 and 65 nm nodes","authors":"J. Shepard, A. Chou, M. Chudzik, C. Collins, M. Freiler, Wei He, P. Kirsch, A. Loebl, R. Mo, P. Ronsheim, E. Rottenkolber, Wenjuan Zhu","doi":"10.1109/RTP.2005.1613681","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613681","url":null,"abstract":"Thin gate oxide processes for advanced semiconductor manufacturing present many challenges at both the 90 and 65 nm technology nodes. In most cases the films are oxynitride materials (SiO/sub x/N/sub y/) constructed in single wafer tools clustered on the same common platform. The combination of discrete process chambers and the atomic dimensions of the dielectric puts a premium on film characterization and process control. The electrical specifications are severe with common values of /spl plusmn/1 /spl Aring/ leading to nitrogen and oxygen dose requirements of better than /spl plusmn/5E14 at/cm/sup 2/. In the recent past difficulties maintaining those specifications have repeatedly lead to tool down situations and limited run paths. In the aftermath of those events, the investigations which followed exposed weaknesses in both the metrology and the qualification strategies used to characterize those processes. In this paper, a number of examples will be presented which illustrate the sensitivity of the composite process to excursions in any of its component steps. The relative sensitivities of different in-line measurement techniques (optical, electrical, and chemical) will be reported and the data used to illustrate the clear advantages of in-line compositional analysis.","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123026508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Manufacturability comparison of thin oxynitride films 氮化氧薄膜的可制造性比较

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613694

H. Preuss, J. Nakos, E. Adams, J. Burnham

引用次数: 0

Non-contact characterization of several silicon oxides oxynitrides grown by rapid thermal processing 几种快速热处理生长的氧化氮化硅的非接触表征

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613693

O. Storbeck, R. Hayn, W. Pethe

{"title":"Non-contact characterization of several silicon oxides oxynitrides grown by rapid thermal processing","authors":"O. Storbeck, R. Hayn, W. Pethe","doi":"10.1109/RTP.2005.1613693","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613693","url":null,"abstract":"The electrical properties of several potential gate dielectric materials as silicon oxides and oxynitrides with thicknesses of 15-35 Aring have been analyzed by the corona characterization of semiconductor (Cocos) method. The silicon oxides are grown by conventional furnace as well as by wet and radical RT oxidation processes while the silicon oxynitrides represented by reoxidized RT nitride and plasma nitrided RTO films. The influence of the different growth techniques as well as hydrogen and inert post anneals have been studied in order to investigate their influence especially on interface state density and flatband voltage. In case of silicon oxynitride films, time-of-flight secondary ion mass spectrometry was done to determine the content and distribution of oxygen and nitrogen. The preparation free non-contact method of the corona characterization was used to obtain electrical parameters as equivalent oxide thickness, interface state density, flatband voltage and oxide leakage. It could be shown that with this comprehensive set of parameters the in-line monitoring of advanced RT grown gate dielectrics can be performed","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"221 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114844854","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Temperature and doping dependence of the radiative properties of silicon: Drude model revisited 温度和掺杂对硅辐射特性的依赖:德鲁德模型的重新审视

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613717

Bong Jae Lee, Zhuomin M. Zhang

{"title":"Temperature and doping dependence of the radiative properties of silicon: Drude model revisited","authors":"Bong Jae Lee, Zhuomin M. Zhang","doi":"10.1109/RTP.2005.1613717","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613717","url":null,"abstract":"Understanding the radiative properties of silicon is crucial to accurate measurement of the temperature of silicon wafer during rapid thermal processing (RTP). Prediction of the radiative properties requires precise knowledge of the dielectric function of silicon in RTP environments. In general, the dielectric function or equivalently optical constants of silicon are complicated functions of the wavelength, temperature, and dopant concentration. To model the free-carrier absorption of doped silicon, the Drude model has been used in many literatures. However, some of the existing Drude model parameters do not agree with other published data. Hence, the present study carefully revisits the Drude model parameters such as carrier concentrations and carrier scattering times. Based on updated Drude model parameters, the absorption coefficients of doped silicon at various dopant concentrations and temperatures are calculated and compared with the available measured data. Reasonably good agreements between the prediction and experimental data are found, suggesting that present Drude model is an efficient way to model the dielectric function of doped silicon","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131131866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 14

Advanced activation and stability of ultra-shallow junctions using flash-assisted RTP 使用闪光灯辅助RTP的超浅连接的高级激活和稳定性

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613685

J. Gelpey, S. Mccoy, W. Lerch, S. Paul, J. Niess, F. Cristiano, D. Bolze

{"title":"Advanced activation and stability of ultra-shallow junctions using flash-assisted RTP","authors":"J. Gelpey, S. Mccoy, W. Lerch, S. Paul, J. Niess, F. Cristiano, D. Bolze","doi":"10.1109/RTP.2005.1613685","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613685","url":null,"abstract":"Advanced-logic device technology for the 65 nm node and beyond requires highly-activated, shallow, and abrupt dopant profiles (Int. Technol. Roadmap for Semicond., 2003). The combination of ion implantation and an advanced annealing technology is expected to provide solutions for these requirements. In contrast to spike annealing, a diffusion-less but highly activating, high-temperature, flash-assisted RTP annealing approach for the formation of ultra-shallow junctions will be demonstrated. The flash-assisted RTP technique is a promising method for achieving junction depth and sheet resistance values low enough to meet the performance specifications for the 65 nm node and beyond (Gelpey, et al., 2002, McCoy, et al., 2004). The optimal process for high activation during flash-assisted RTP involves a temperature ramp-up to an intermediate temperature between 700degC and 900degC and, once the intermediate temperature is reached, a very short, intense flash on the front side of the wafer induces a temperature jump up to 1325degC with a peak width of approximately 1.6 ms in a 100 ppm oxygen in nitrogen gaseous ambient. In this paper, we will present some of our recent p+MOS and n+MOS results on the fabrication of ultra-shallow junctions using flash-assisted RTP in crystalline and pre-amorphized silicon. It will be shown that such junctions are suitable for future technology generations. The measured \"mechanical/electrical\" sheet resistance values of the junctions are compared to Hall measurements on the same samples to gain an insight into the reliability of the destructive four-point probe (4PP) method for such extremely shallow junctions. Deactivation studies will be presented to examine the stability of the process to the required subsequent thermal processes","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121157963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Importance of heat-up ramp rate for palladium-silicide fully-silicided-gate structure formation 升温斜坡速率对硅化钯全硅化栅结构形成的重要性

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613697

K. Sano, T. Hosoi, K. Shibahara

{"title":"Importance of heat-up ramp rate for palladium-silicide fully-silicided-gate structure formation","authors":"K. Sano, T. Hosoi, K. Shibahara","doi":"10.1109/RTP.2005.1613697","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613697","url":null,"abstract":"Silicidation process for fully-silicided (FUSI) Pd2Si gate formation has been investigated. Two types of heating equipment was used for siliciding palladium deposited on a poly-Si/SiO2/Si MOS structure. One is lamp heating in a sputtering chamber and another is hot-plate heating. The former provide slower heat-up ramp because of relatively large thermal capacity. In this case, metal-rich phase was formed in the first stage of silicidation and it changed to Pd2 Si phase by additional heating after completion of silicidation reaction. FUSI utilizes impurity pre-doping to poly-Si to modulate workfunction. Pre-doping to poly-Si sometimes resulted in needle structure formation on a top of silicided film and voids at the interface between silicide and SiO2. These defects were reduced by silicidation with hot plate heating. In addition, Pd2 Si phase was obtained at the early stage of silicidation. Palladium and silicon reacts even at temperatures lower than 250degC. Therefore, in the case of the lamp heating, silicidation during heating is not negligible. These results are explainable considering change of major diffusion species during silicidation","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"27 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120890049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Suppression of thermal interface degradation in high-k film/Si by helium 氦抑制高k膜/Si热界面降解

2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613682

K. Muraoka

{"title":"Suppression of thermal interface degradation in high-k film/Si by helium","authors":"K. Muraoka","doi":"10.1109/RTP.2005.1613682","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613682","url":null,"abstract":"Suppression of thermal interface degradation, especially silicidation, in high-k film (ZrO2, HfO2)/Si systems by a helium (He) process, which adds He gas during various annealing processes, was demonstrated. The high-k film/SiO2/Si thermal interface stability was investigated in terms of N2, and He gas annealing with controlled oxygen partial pressure (PO2) at 920degC. A comparison of N2 and He annealing with controlled PO2 revealed that the optimal PO2 ranges in He at which the thermal stability of a layered structure can be achieved are wider than that in N2. Moreover, regarding the poly-Si/SiO2/high-k film interface, it was found that He through process consisting of low-temperature SiH 4 flow diluted by He and high-pressure He post-annealing is the most effective means of suppressing silicidation, whereas a conventional N2 through process cannot. These results indicate that high-concentration He atoms are indispensable for the upper poly-Si/SiO2 interface. It is supposed that many He atoms physically obstruct SiO creation through the quenching of atomic vibration at the SiO2/Si interface, thus impeding the first step of the silicidation reaction","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"400 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115918743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0