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2005 13th International Conference on Advanced Thermal Processing of Semiconductors最新文献

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The accurate modeling of temperature response of semiconductor production wafers during rapid thermal processing 快速热加工过程中半导体生产晶圆温度响应的精确建模
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613720
B. Lojek
{"title":"The accurate modeling of temperature response of semiconductor production wafers during rapid thermal processing","authors":"B. Lojek","doi":"10.1109/RTP.2005.1613720","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613720","url":null,"abstract":"When a production semiconductor with un-relaxed ion-implanted regions or wafer is subject to external irradiation, a portion of the incident energy is absorbed within the wafer volume, rather than at the surface. The volume absorption will alter the distribution energy within the wafer, resulting in temperature non-uniformity. In order to access the contribution of the volume absorption and emission processes the mathematical model and Fortran code was developed. The energy equation is solved in conjunction with the radiation problem. The one-dimensional transient problem is solved using the Crank-Nicholson scheme. Input to the model includes material properties specified in a look-up table form. The spectral ellipsometry is used to determine the optical properties of the ion-implanted model. The model shows the difference in the surface temperature of the wafer similar to the results observed experimentally","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134388306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The determination of annealing program for NiSi formation NiSi形成退火程序的确定
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613704
Yi wei Chen, H. Chiang, K. Hsieh, Tzung Yu Huang, Yuhsiang Chang, Chien-Chung Huang, S. F. Tzou
{"title":"The determination of annealing program for NiSi formation","authors":"Yi wei Chen, H. Chiang, K. Hsieh, Tzung Yu Huang, Yuhsiang Chang, Chien-Chung Huang, S. F. Tzou","doi":"10.1109/RTP.2005.1613704","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613704","url":null,"abstract":"The objective of this research was to form a uniform NiSi layer on MOSFET devices. It has been widely recognized that two-step rapid thermal processing (RTP) is much more effective than one-step RTP in controlling the silicide thickness, and reverse narrow poly line effect. In addition to verifying the number of RTP process steps, soak annealing and spike annealing were intensively investigated to find the most beneficial annealing program. In this paper, we present the progress we made with soak and spike anneals, as well as the effects of implementing them in either RTP1 or RTP2 step in NiSi formation. The results indicate that if a soak anneal was adopted for RTP1 step, the phase transformation is more gentle than a spike anneal, which leads to fewer e-beam inspection defects, better surface roughness, and superior device performance. If a spike anneal was applied as RTP2 step, it would result in much fewer bright voltage contrast (BVC) defects by e-beam inspection on NMOS, compared to a soak anneal. This would suppress the structure defect found in the NMOS NiSi layer, and greatly alleviate the N+/P-well junction leakage degradation issue","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"47 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120981420","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Pyrometry for laser annealing 激光退火热分析法
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613690
B. Adams, A. Mayur, A. Hunter, R. Ramanujam
{"title":"Pyrometry for laser annealing","authors":"B. Adams, A. Mayur, A. Hunter, R. Ramanujam","doi":"10.1109/RTP.2005.1613690","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613690","url":null,"abstract":"Laser annealing is one of the process solutions to enable ultra shallow junction (USJ) formation for the 45 nm technology node. However, variations in the front-side optical properties of device wafers cause large temperature variations on the wafer surface which, in turn, cause large variations in activation of the dopants that form the junction. As a result, pyrometry and closed loop temperature control are critical to establish process uniformity and repeatability for laser annealing. Pyrometry results are presented along with the correlation between the process results (dopant activation) and the pyrometer signal. Closed loop control and future technical challenges are discussed","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"07 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121367775","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Low temperature copper de-oxidation 低温铜脱氧
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613703
K. Funk, A. v Zutphen, E. Granneman
{"title":"Low temperature copper de-oxidation","authors":"K. Funk, A. v Zutphen, E. Granneman","doi":"10.1109/RTP.2005.1613703","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613703","url":null,"abstract":"The impact of a post deposition annealing step of ECD copper and of a predeposition annealing step on the Cu seed has been investigated. Compared to forming gas it can be demonstrated that the addition of a small amount of ethanol can very effectively reduce the surface and grain boundary oxidation with benefits for the electrical parameters. The impact of a de-oxidation step down to 100degC on the Cu seed and its consequences for the ECD Cu growth are presented","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"2 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134319360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Temperature non-uniformity from combined conduction and radiation heat transfer within a doped wafer 掺杂晶圆片内传导和辐射复合传热引起的温度不均匀性
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613716
A. Asano, P. Hsu, B. Lojek
{"title":"Temperature non-uniformity from combined conduction and radiation heat transfer within a doped wafer","authors":"A. Asano, P. Hsu, B. Lojek","doi":"10.1109/RTP.2005.1613716","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613716","url":null,"abstract":"It has been proposed that the volumetric radiation heat absorption/emission inside the wafer should be considered in the rapid thermal processing to account for the temperature distribution. In this study, the combined conduction and radiation heat transfer inside the wafer was solved by using a commercial computational fluid dynamics and heat transfer software tool. Since the precise information of the thermal transport and optical properties of doped and undoped silicon are not known, transport properties were parametrically varied to examine their effects on the computed temperature distribution across the wafer and between the top and bottom sides. The study found that the temperature distribution across the wafer was sufficiently different when the radiation heat transfer was considered in the overall energy balance. It was also found that the variation of conductivity has a smaller effect on the temperature difference. Increased surface emissivity lead to slightly higher cross-wafer temperature difference but much larger mean temperature of the wafer. It confirms the important role of surface radiative property in the thermal energy control. The work has shown that volumetric radiation heat transfer needs to be considered and becomes even more important in the next generation milliseconds annealing processes","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133407589","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Advanced thermal processing of semiconductor materials in the msec-range 微秒范围内半导体材料的高级热加工
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613684
W. Skorupa, R. Yankov, M. Voelskow, W. Anwand, D. Panknin, R. Mcmahon, Michael Smith, T. Gebel, L. Rebohle, R. Fendler, W. Hentsch
{"title":"Advanced thermal processing of semiconductor materials in the msec-range","authors":"W. Skorupa, R. Yankov, M. Voelskow, W. Anwand, D. Panknin, R. Mcmahon, Michael Smith, T. Gebel, L. Rebohle, R. Fendler, W. Hentsch","doi":"10.1109/RTP.2005.1613684","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613684","url":null,"abstract":"This paper reviews the advances that flash lamp annealing brings to the processing of the most frequently used semiconductor materials, namely silicon and silicon carbide, thus enabling the fabrication of novel microelectronic structures and materials. The paper describes how such developments can translate into important practical applications leading to a wide range of technological benefits. Opportunities in ultra-shallow junction formation, heteroepitaxial growth of thin films of cubic silicon carbide on silicon, and crystallization of amorphous silicon films, along with the technical reasons for using flash lamp annealing are discussed in the context of state-of-the-art materials processing","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128972976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Physical aspects of particle deposition in RTP RTP中粒子沉积的物理方面
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613712
P. Schmid, S. Frigge, T. Huelsmann, B. Nadig, Z. Nényei, R. Reisdorf
{"title":"Physical aspects of particle deposition in RTP","authors":"P. Schmid, S. Frigge, T. Huelsmann, B. Nadig, Z. Nényei, R. Reisdorf","doi":"10.1109/RTP.2005.1613712","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613712","url":null,"abstract":"Advanced-logic and DRAM technology for the 90 nm node and beyond results in increasingly stringent particle specifications. Particles can be transported to the sensitive wafer surface via sedimentation, convective diffusion, thermo- electro-and photophoresis. Depending on the manufacturing equipment, the various transport mechanisms are more or less dominant. In atmospheric rapid thermal processing (RTP) equipment for instance, thermophoresis strongly influences the particle transport. Therefore it is important to control this effect such that it protects the wafer surface from particles rather than contaminate it. This paper briefly explains the physical aspects of the different particle transport mechanisms, but mainly it focuses on experimental data on thermo- and photophoresis, including 10000 wafer marathon run and production data. For particle generating processes correctly tuned thermophoresis reduces the particle number on the wafer by an order of magnitude","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125894157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Combination of Plasma Doping and Flash anneal RTP for 45nm CMOS node 45纳米CMOS节点等离子体掺杂与Flash退火RTP的结合
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613700
F. Lallement, D. Lenoble
{"title":"Combination of Plasma Doping and Flash anneal RTP for 45nm CMOS node","authors":"F. Lallement, D. Lenoble","doi":"10.1109/RTP.2005.1613700","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613700","url":null,"abstract":"The capabilities of plasma doping (PLAD) associated with flash lamp annealing have been evaluated to meet the ITRS requirements for 45nm CMOS node. First, material studies of P+/N junction fabricated by PLAD and activated by flash were performed via Secondary Ion Mass Spectrometry (SIMS) and Transmission Electron Microscopy (TEM) analysis. The results were then compared with the standard annealing approach via Rapid Thermal Annealing (RTP) using Ultra Low Energy (ULE) implantations and PLAD. For the first time, P+/N and N+/P PLAD junctions activated by flash annealing were electrically measured on specific structures in order to extract junction current leakage. Finally, the sheet resistance and junction depth trade-off of such fabricated USJ fulfils the 45nm ITRS specifications with acceptable junction leakage current.","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129474935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
SiON gate dielectric formation by rapid thermal oxidation of nitrided Si 氮化硅快速热氧化形成的硅栅电介质
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1613695
J. Everaert, T. Conard, M. Schaekers
{"title":"SiON gate dielectric formation by rapid thermal oxidation of nitrided Si","authors":"J. Everaert, T. Conard, M. Schaekers","doi":"10.1109/RTP.2005.1613695","DOIUrl":"https://doi.org/10.1109/RTP.2005.1613695","url":null,"abstract":"SiON gate dielectric is optimized for general purpose 65 nm node applications by using a first nitridation approach. A process parameter screening is done where the resulting SiON films are analyzed by angle resolved XPS and non-contact probing by Quantox. Good correlation between XPS and Quantox results are found. We demonstrate also correlation between Quantox results and transistor performance. It shows that the first nitridation approach is promising for reducing gate leakage resulting in better off-state current","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131979578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Superior Spike Annealing Performance in 65nm Source/Drain Extension Engineering 在65nm源/漏扩展工程中具有优越的峰值退火性能
2005 13th International Conference on Advanced Thermal Processing of Semiconductors Pub Date : 2005-10-04 DOI: 10.1109/RTP.2005.1614331
C.I. Li, C. Chien, K.T. Huang, Po Yuan Chen, H. Wang, S. F. Tzou, S. Chen, J. Lin, T. Fu, R. Tandjaja, S. Ramamurthy, E. Chung, J. Chuang, Wen-Shan Chen
{"title":"Superior Spike Annealing Performance in 65nm Source/Drain Extension Engineering","authors":"C.I. Li, C. Chien, K.T. Huang, Po Yuan Chen, H. Wang, S. F. Tzou, S. Chen, J. Lin, T. Fu, R. Tandjaja, S. Ramamurthy, E. Chung, J. Chuang, Wen-Shan Chen","doi":"10.1109/RTP.2005.1614331","DOIUrl":"https://doi.org/10.1109/RTP.2005.1614331","url":null,"abstract":"To meet the requirements of smaller devices while still maintaining high performance, it is necessary to form shallow source/drain extensions with high activation. For 65nm devices, reducing the \"peak width\" of spike annealing will enhance device performance. Two RTP tools were compared by 65nm device performance with different residence times (1.4s and 1.85s). Spike anneal thermal profile of the shorter residence time (1.4s) demonstrated ̃4% reduction in Cov and improved Vt roll-off based on device data. The improvement is due to the efficient suppression of lateral diffusion in source/drain extensions. RTP A demonstrates this improvement while retaining the same Ion/Ioffperformance as delivered in the larger thermal budget spike anneal system. In this paper we show that shorter residence time (\"peak width\") is required to improve ultra-shallow junction performance in 65nm devices as characterized by Ion/Ioff, and Vt parameters.","PeriodicalId":253409,"journal":{"name":"2005 13th International Conference on Advanced Thermal Processing of Semiconductors","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125989583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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