Jae-Joon Kim, B. Linder, R. Rao, Tae-Hyoung Kim, P. Lu, K. Jenkins, C. Kim, A. Bansal, S. Mukhopadhyay, C. Chuang
{"title":"Reliability monitoring ring oscillator structures for isolated/combined NBTI and PBTI measurement in high-k metal gate technologies","authors":"Jae-Joon Kim, B. Linder, R. Rao, Tae-Hyoung Kim, P. Lu, K. Jenkins, C. Kim, A. Bansal, S. Mukhopadhyay, C. Chuang","doi":"10.1109/IRPS.2011.5784450","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784450","url":null,"abstract":"Ring oscillator (RO) structures that separate NBTI and PBTI effects are implemented in a high-k metal gate technology. The measurement results clearly show significant RO frequency degradation from PBTI as well as NBTI. For comparison, RO structures with the same principle are also implemented in a SiO2/poly-gate technology, where PBTI is negligible. Experimental results show noticeable frequency degradation under NBTI-only stress mode but negligible degradation under PBTI-only mode, which illustrates the validity of the proposed principle and structures.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125288256","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Toledano-Luque, B. Kaczer, P. Roussel, T. Grasser, G. Wirth, J. Franco, C. Vrancken, N. Horiguchi, G. Groeseneken
{"title":"Response of a single trap to AC negative Bias Temperature stress","authors":"M. Toledano-Luque, B. Kaczer, P. Roussel, T. Grasser, G. Wirth, J. Franco, C. Vrancken, N. Horiguchi, G. Groeseneken","doi":"10.1109/IRPS.2011.5784501","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784501","url":null,"abstract":"We study the properties of a single gate oxide trap subjected to AC Bias Temperature Instability (BTI) stress conditions by means of Time Dependent Defect Spectroscopy. A theory for predicting the occupancy of a single trap after AC stress is developed based on first order kinetics and verified on experimental data. The developed theory can be used to develop circuit simulators and predict time dependent variability.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"204 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126079413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Min Chen, V. Reddy, J. Carulli, S. Krishnan, V. Rentala, V. Srinivasan, Yu Cao
{"title":"A TDC-based test platform for dynamic circuit aging characterization","authors":"Min Chen, V. Reddy, J. Carulli, S. Krishnan, V. Rentala, V. Srinivasan, Yu Cao","doi":"10.1109/IRPS.2011.5784448","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784448","url":null,"abstract":"An on-chip 45nm test platform that directly monitors circuit performance degradation during dynamic operation is demonstrated. In contrast to traditional ring-oscillator (RO) based frequency measurements, it utilizes a Time-to-Digital Converter (TDC) with 2ps resolution to efficiently monitor circuit delay change on-the-fly. This new technique allows the capability of measuring signal edge degradation under various realistic circuit operating scenarios, such as asymmetric aging, dynamic voltage/frequency scaling, dynamic duty cycle factors, and temperature variations.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126393472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Miccoli, C. Monzio Compagnoni, A. Spinelli, A. Lacaita
{"title":"Investigation of the programming accuracy of a double-verify ISPP algorithm for nanoscale NAND Flash memories","authors":"C. Miccoli, C. Monzio Compagnoni, A. Spinelli, A. Lacaita","doi":"10.1109/IRPS.2011.5784588","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784588","url":null,"abstract":"This paper presents a detailed investigation of the performance of a double-verify algorithm for accurate programming of deca-nanometer NAND Flash memories. In order to minimize the programmed threshold-voltage distribution width in presence of discrete and statistical electron injection, a weakened programming step is applied to cells if their threshold voltage falls between a low- and a high-program-verify level during incremental step pulse programming. Clear improvements are shown with respect to the single-verify case, with minimal burdens on programming time and complexity.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124190655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Ryan, L. Yu, J. Han, J. Kopanski, K. Cheung, F. Zhang, C. Wang, J. Campbell, J. Suehle, V. Tilak, J. Fronheiser
{"title":"A new interface defect spectroscopy method","authors":"J. Ryan, L. Yu, J. Han, J. Kopanski, K. Cheung, F. Zhang, C. Wang, J. Campbell, J. Suehle, V. Tilak, J. Fronheiser","doi":"10.1109/VTSA.2011.5872242","DOIUrl":"https://doi.org/10.1109/VTSA.2011.5872242","url":null,"abstract":"A new interface defect spectroscopy method based on variable height charge pumping capable of observing the amphoteric nature of Si/SiO2 interface states in production quality sub-micron devices is demonstrated. It can help to resolve the long standing debate about the true nature of Si/SiO2 interface states. Additionally, we show that this is a powerful technique for studying other important material systems.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122203859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Veksler, G. Bersuker, A. Koudymov, C. Young, M. Liehr, B. Taylor
{"title":"Comprehensive analysis of charge pumping data for trap identification","authors":"D. Veksler, G. Bersuker, A. Koudymov, C. Young, M. Liehr, B. Taylor","doi":"10.1109/IRPS.2011.5784581","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784581","url":null,"abstract":"Analysis methodology for the charge pumping (CP) data, which considers non-elastic electron/hole capturing and releasing processes, is proposed. It is shown that the multi-phonon-assisted rearrangement of the dielectric lattice around the traps, associated with the charge trapping, is important for the interpretation of experimental results and needs to be taken into account. Analysis of the temperature dependent multi-frequency charge pumping data, measured on the MOSFETs with different thickness of the interfacial layer in the high-k dielectric gate stack, allowed to extract the trap energy and spatial profiles and helps to identify the nature of these traps.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128864374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Croes, M. Lofrano, C. Wilson, L. Carbonell, Y. Siew, G. Beyer, Z. Tokei
{"title":"Study of void formation kinetics in Cu interconnects using local sense structures","authors":"K. Croes, M. Lofrano, C. Wilson, L. Carbonell, Y. Siew, G. Beyer, Z. Tokei","doi":"10.1109/IRPS.2011.5784495","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784495","url":null,"abstract":"A test structure that allows the study of void formation kinetics during electromigration is proposed and characterized. Compared to a standard single-via electromigration test structure voltage-senses are placed near the via. This allows monitoring resistance changes before final void formation, while the void formation process is not affected. Part of the samples show single void formation, while for other samples, multiple voids are formed. For the single void case, a model is proposed to calculate void-depth as a function of time. Initially, voids grow faster and this growth slows down towards the end of the void formation process. Estimated velocities during void formation are in the same order of magnitude compared to literature results of drift velocities during void growth. Cases where multiple voids are formed show that voids which initially form further away from the via stop growing upon formation of a void closer to the via.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133816048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Precise understanding of data retention mechanisms for MONOS memories: Toward simultaneous improvement of retention and endurance performances by SiN engineering","authors":"S. Fujii, R. Fujitsuka, K. Sekine, N. Yasuda","doi":"10.1109/IRPS.2011.5784589","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784589","url":null,"abstract":"We investigate the charge leakage path during data retention through the evaluation of its temperature dependence. As a result, it is experimentally demonstrated for the first time that the main leakage path of trapped charge changes depending on retention time. Furthermore, the direction of leakage path rather than trap energy profile in the SiN layer determines the temperature dependence of data retention characteristics. In addition, it is found that cycling degradation of data retention is due to increase in the charge loss through the tunnel layer. Based on the accurate understanding of data retention mechanisms, we show the possibility to achieve both of data retention and endurance improvements by SiN engineering.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114316054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Choi, Dong-Cheon Baek, T. Jeong, M. Yeo, Miji Lee, A. Kim, Jongwoo Park
{"title":"A practical modeling for transient thermal characteristics of multilevel interconnects","authors":"S. Choi, Dong-Cheon Baek, T. Jeong, M. Yeo, Miji Lee, A. Kim, Jongwoo Park","doi":"10.1109/IRPS.2011.5784569","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784569","url":null,"abstract":"In this study, intuitive is given on time-dependent thermal characteristics in multilevel interconnects subjected to carry either DC or pulsed-DC. FEM simulation is employed to model the propensity of temperature profile with respect to the variety of interconnects having different geometrical features in terms of metal width, metal height and distance between metal and Si substrate. Accordingly, a practical model that enables to prognosis temperature increase resulting from current-driven metal interconnects and temperature decrease after current carried along metal line stops is developed. It is found that a proposed model precisely predicts thermal transient arisen from metal interconnect, regardless of geometrical factors of metal dimension and location. In addition, transient thermal behavior of metal interconnects carrying pulsed DC with various frequencies is investigated. A circuit designer is required to adjust the maximum allowable current carried along metal interconnects according to the frequency of pulsed DC as well as geometrical dimensions of metal interconnects. Hence, robustness in circuit design even in the earlier stage of development phase can be accomplished for metal interconnects by suppressing electromigration and rupture caused by thermal transient.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115024851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Ganesh, S. Rajasekhara, D. Bultreys, P. Ferreira
{"title":"Rapid and automated grain orientation and grain boundary analysis in nanoscale copper interconnects","authors":"K. Ganesh, S. Rajasekhara, D. Bultreys, P. Ferreira","doi":"10.1109/IRPS.2011.5784524","DOIUrl":"https://doi.org/10.1109/IRPS.2011.5784524","url":null,"abstract":"A combination of diffraction scanning transmission electron microscopy (D-STEM) and automated precession microscopy is used to obtain orientation information from 108 copper grains in 120 nm wide copper interconnect lines. Grain boundary analysis based on this orientation data reveals that Σ3n (n = 1, 2) boundaries are predominant in these lines. Finite element analysis reveals regions of high and low stresses within the copper microstructure.","PeriodicalId":242672,"journal":{"name":"2011 International Reliability Physics Symposium","volume":"247 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134462327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}