Min Chen, V. Reddy, J. Carulli, S. Krishnan, V. Rentala, V. Srinivasan, Yu Cao
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A TDC-based test platform for dynamic circuit aging characterization
An on-chip 45nm test platform that directly monitors circuit performance degradation during dynamic operation is demonstrated. In contrast to traditional ring-oscillator (RO) based frequency measurements, it utilizes a Time-to-Digital Converter (TDC) with 2ps resolution to efficiently monitor circuit delay change on-the-fly. This new technique allows the capability of measuring signal edge degradation under various realistic circuit operating scenarios, such as asymmetric aging, dynamic voltage/frequency scaling, dynamic duty cycle factors, and temperature variations.