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ICCDLAB : Silicon Chip Tooling for Failure Analysis Laboratories 用于故障分析实验室的硅芯片工具

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023p0214

Nicolas Lysee, Thierry Parrassin, Céline Le Gloanec, Bertrand Borot, Sylvain Dudit

引用次数: 0

An Introduction to the FIB as a Microchip Circuit Edit Tool (2023 Update) 介绍FIB作为微芯片电路编辑工具(2023更新)

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023tpb2

Steven Herschbein, Shida Tan, Richard Livengood, Michael Wong

引用次数: 0

MOSFET Testing and Interpretation Overview MOSFET测试和解释概述

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023tpc1

Dave Albert

引用次数: 0

A Failure Caused by Extended Cross-Defect in DRAM DRAM中扩展交叉缺陷引起的故障

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023p0187

Jaehoon Lee, Jinseon Kim, Dongguk Han, Seunghun Lee, Sunwoo Kim, Jingyeong Seol, Seungjin Lee, Kyoungrak Cho, Incheol Nam, Daesun Kim, Beomseop Lee, Heeil Hong, Sangjun Hwang

{"title":"A Failure Caused by Extended Cross-Defect in DRAM","authors":"Jaehoon Lee, Jinseon Kim, Dongguk Han, Seunghun Lee, Sunwoo Kim, Jingyeong Seol, Seungjin Lee, Kyoungrak Cho, Incheol Nam, Daesun Kim, Beomseop Lee, Heeil Hong, Sangjun Hwang","doi":"10.31399/asm.cp.istfa2023p0187","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2023p0187","url":null,"abstract":"Abstract As memory devices decrease in dimensions, particles are found to be a major source of defects in unexpected DRAM failures due to their relatively large size. Among many DRAM defects, cross-defects account for the majority of system failures for a long time. Hard cross-defects are frequently observed in the first test step. Most of these defective cells are repaired with row or column redundancy resources. However, after high voltage and temperature stress, some of the cross-defects can additionally spread to adjacent rows or columns with reduced resistance. Recently, a new type of bridge cross-defect accompanied by row failures has emerged. This can be detected electrically through current measurements of 2 wordline (WL) under active mode. But, these defects are not obvious even after both high temperature and voltage stress. The bridge causes intermittent failure in the row-direction during DRAM operation. This soft 2-WL bridge is considered a serious fault source that can cause uncorrectable error (UE) at the system level even though on-die error correction code (ODECC) is introduced. Therefore, it is very important to find, improve, and develop control methods on such defects for future DRAM enhancement. In this paper, 2-WL defects or extended cross-defect were intensively analyzed through electrical failure analysis (eFA) and physical FA (pFA). Results reveal fine particles as the cause.","PeriodicalId":20443,"journal":{"name":"Proceedings","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136353486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Open Localization with LIT 使用LIT进行开放定位

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023p0238

Marc van Veenhuizen, Jinbo Wan, Shuhan Yang, Lei Peters-Wu

引用次数: 0

Defect Isolation in Advanced Nodes Large Circuitry Structures using a Combination of FIB Circuit Edits and Passive Voltage Contrast 利用FIB电路编辑和无源电压对比相结合的先进节点大型电路结构缺陷隔离

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023p0295

Michael Allen Rodder, Gina Cha, Gil Tovar, Kah Chin Cheong, Christopher Penley

引用次数: 0

Spatial Resolution Enhancement of Time-Resolved Photon Emission Imaging with Superconducting Nanowire Single Photon Detector 利用超导纳米线单光子探测器增强时间分辨光子发射成像的空间分辨率

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023p0220

Norimichi Chinone, Hirotoshi Terada, Tomonori Nakamura, Yoshiyuki Yokoyama, Toru Matsumoto

引用次数: 0

Electron Beam Induced Resistance Change for Isolation of Wordline Shorts in 3D Replacement Gate NAND 电子束诱导的三维替换栅NAND中字线短路隔离的电阻变化

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023p0197

Chandler Rich, Wayne Harlow, Becky Muñoz, Regino Sandoval, J. Temo Davis, Scott Williams

引用次数: 0

Methods to Enhance Infrared Imaging for Defect Localization Using Lock-in Thermography 利用锁定热成像增强红外成像缺陷定位的方法

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023p0155

Anjanashree M.R. Sharma, Kristof J.P. Jacobs, Ingrid De Wolf

{"title":"Methods to Enhance Infrared Imaging for Defect Localization Using Lock-in Thermography","authors":"Anjanashree M.R. Sharma, Kristof J.P. Jacobs, Ingrid De Wolf","doi":"10.31399/asm.cp.istfa2023p0155","DOIUrl":"https://doi.org/10.31399/asm.cp.istfa2023p0155","url":null,"abstract":"Abstract In this paper, we demonstrate three approaches to enhance the topographical contrast of infrared images obtained from lockin thermography (LIT). Infrared imaging, particularly LIT, is one of the extensively used techniques for failure analysis (FA) in the semiconductor industry. However, low-contrast topography images are obtained at room temperature from conventional LIT due to poor emissivity contrast in the devices and the limitation on the performance of the infrared camera. The gray-scale topographical contrast is improved by 85% when the device under test is heated from room temperature to 75°C, using a printed circuit board heater. Furthermore, a heat-assisted LIT approach is proposed and demonstrated at the die level on an electrically leaky silicon interposer sample. The topographical contrast and the signal intensity of the hotspot obtained are enhanced when compared to the classical LIT, which is performed at room temperature. Further, the dual LIT approach is developed to reduce the thermal budget of the heat-assisted approach. The hotspot amplitude and improved topography image are obtained from two consecutive lock-in measurements. In addition, the topography image from this technique is obtained by averaging several hundred frames from the camera for a period of ten minutes, which results in an image that is less susceptible to input noise levels. To increase the throughput of the FA process, quadrature lock-in thermography, a dual-purpose measurement technique is shown. A high-contrast topography image and the hotspot location are obtained from the same lock-in thermogram by performing trigonometric conditioning. The throughput from this approach is the same as the classical LIT technique.","PeriodicalId":20443,"journal":{"name":"Proceedings","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136352366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Machine Learning Based Data and Signal Analysis Methods for the Application in Failure Analysis (2023 Update) 基于机器学习的数据和信号分析方法在故障分析中的应用(2023更新)

Proceedings Pub Date : 2023-11-12 DOI: 10.31399/asm.cp.istfa2023tpw1

Michael Kögel, Sebastian Brand, Frank Altmann

引用次数: 0