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Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95最新文献

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800 V GaAs MESFET for power switching applications 用于功率开关应用的800 V GaAs MESFET
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515025
N. Wright, C. Johnson, A. O'Neill, M. Hossin, R. Gwilliam
{"title":"800 V GaAs MESFET for power switching applications","authors":"N. Wright, C. Johnson, A. O'Neill, M. Hossin, R. Gwilliam","doi":"10.1109/ISPSD.1995.515025","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515025","url":null,"abstract":"A technologically feasible solution to the need for high-speed power switching devices is presented. The paper details the design of a new GaAs MESFET device capable of operation at voltages up to 800 V, currents up to 10 A and switching frequencies in excess of 10 MHz.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114819563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Influence of parasitic capacitances on switching characteristics of SOI-LDMOSs 寄生电容对SOI-LDMOSs开关特性的影响
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515054
Y. Suzuki, Y. Leung, S.S. Wong
{"title":"Influence of parasitic capacitances on switching characteristics of SOI-LDMOSs","authors":"Y. Suzuki, Y. Leung, S.S. Wong","doi":"10.1109/ISPSD.1995.515054","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515054","url":null,"abstract":"This paper describes the influence of parasitic capacitances on the switching characteristics of lateral DMOSFETs fabricated in Silicon on Insulator (SOI) substrates with silicon thicknesses from 1 to 20 /spl mu/m. The dependences of the parasitic capacitances, especially an additional drain-substrate capacitance attributed to the use of an SOI substrate, on the drift region length, silicon layer thickness and buried oxide thickness are confirmed experimentally. It is shown that optimization of these parameters is critical for high speed switching applications.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129772496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An accurate PC aided carrier lifetime determination technique from diode reverse recovery waveform 基于二极管反向恢复波形的精确PC辅助载波寿命测定技术
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515075
I. Omura, A. Nakagawa
{"title":"An accurate PC aided carrier lifetime determination technique from diode reverse recovery waveform","authors":"I. Omura, A. Nakagawa","doi":"10.1109/ISPSD.1995.515075","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515075","url":null,"abstract":"A novel technique for determining carrier lifetime from reverse recovery waveform of diodes is presented in this paper. The features of this technique are that the accuracy is significantly improved and lifetime is automatically calculated on a personal computer from waveform data measured by a digital oscilloscope. The proposed technique suits the recent digitization of measurement equipment, and hence simplifies the measurement procedure and improves accuracy of the lifetime measurement.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128611846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Tunneling in thin SOI high voltage devices 超薄SOI高压器件的隧道掘进
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515022
S. Merchant, E. Arnold, M. Simpson
{"title":"Tunneling in thin SOI high voltage devices","authors":"S. Merchant, E. Arnold, M. Simpson","doi":"10.1109/ISPSD.1995.515022","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515022","url":null,"abstract":"Tunneling of electrons from valence to conduction band in thin SOI high voltage devices is reported for the first time. A close correlation between the theoretical and experimental reverse leakage current in 600-700 V thin SOI diodes is shown, including buried oxide thickness dependence, substrate bias dependence, and temperature dependence. Band-to-band tunneling is also verified with numerical simulation.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128678384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A combined power transistor structure for improved switching performances 一种改进开关性能的组合功率晶体管结构
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515050
Kang Baowei, Wu Yu
{"title":"A combined power transistor structure for improved switching performances","authors":"Kang Baowei, Wu Yu","doi":"10.1109/ISPSD.1995.515050","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515050","url":null,"abstract":"A new power bipolar transistor, named Center-Lightly-Doped-Emitter Gate Associated Transistor (CLDE-GAT), has been developed which combines the base structure of the GAT with a center-lightly-doped emitter structure. The experimental results verify that a properly combined structure may results in combination of advantages of the two structures, i.e. high voltage capability with base width thinner than that of the conventional transistor for the GAT and shorter turn-off time for the latter. And because of the simple fabricating process based on the conventional triple-diffused process, it can be concluded that the new structure transistor is a high-speed high-voltage switching device with low on-voltage and low cost.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132476216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Characteristics of an improved lateral emitter switched thyristor 一种改进型侧射极开关晶闸管的特性
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515074
Wei Chen, G. Amaratunga
{"title":"Characteristics of an improved lateral emitter switched thyristor","authors":"Wei Chen, G. Amaratunga","doi":"10.1109/ISPSD.1995.515074","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515074","url":null,"abstract":"A new LEST (lateral emitter switched thyristor) structure is proposed and experimentally verified. The structure differs from the conventional LEST in that it embeds a floating ohmic contact between the n-drift region and the n+ floating emitter. Both simulation and experimental results show that the device has an enhanced turn-on capability compared with the conventional LEST without deteriorating the other characteristics. The device is fabricated using a 3 /spl mu/m CMOS process to have a 320 V breakdown and 0.7 V threshold voltage. Thyristor turn-on is observed at an anode current density of 12.5 A/cm/sup 2/ with 5 V gate voltage. The maximum MOS controllable current density is in excess of 200 A with 5 V gate voltage.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130881088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A high performance IGBT with new n+buffer structure 一种新型n+缓冲结构的高性能IGBT
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515084
H. Takahashi, Y. Ishimura, C. Yokoyama, H. Hagino, T. Yamada
{"title":"A high performance IGBT with new n+buffer structure","authors":"H. Takahashi, Y. Ishimura, C. Yokoyama, H. Hagino, T. Yamada","doi":"10.1109/ISPSD.1995.515084","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515084","url":null,"abstract":"An advanced IGBT with a new n+buffer structure has been developed. The new n+buffer structure is that some n+buried layers are formed at the boundary between a p+substrate and a n+buffer layer. The concentration of the n+buried layers is almost the same as that of the p+substrate. The fabrication of the IGBT with the new n+buffer structure used a 3rd gen 600 V/100 A chip. Taking the VVVF inverter as an application, total power loss generated was about 12% less compared to the conventional IGBT, only changing the n+buffer structure. And the short circuit safe operating area of the new IGBT was almost similar to the conventional IGBT. Moreover, we discussed differences between the new IGBT and the conventional IGBT using a 3D simulator, DAVINCI.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123189652","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
An intelligent power IC with reverse battery protection for high-side solenoid drivers 一个智能电源IC与反向电池保护的高侧电磁驱动器
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515072
K. Sakamoto, Y. Nunogawa, R. Takeshita, K. Satonaka, T. Koda, S. Horiuchi
{"title":"An intelligent power IC with reverse battery protection for high-side solenoid drivers","authors":"K. Sakamoto, Y. Nunogawa, R. Takeshita, K. Satonaka, T. Koda, S. Horiuchi","doi":"10.1109/ISPSD.1995.515072","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515072","url":null,"abstract":"A highly reliable and fast switching intelligent power IC (IPIC) for high-side switches that uses a junction isolation structure is described. This IPIC provides built-in reverse battery protection, which is essential for automotive power switches, not only in usual 12-V battery systems but also in the 24-V battery systems used in large vehicles. This protection is accomplished by integrating a high voltage MOSFET to avoid parasitic diode action. The other notable feature of this IPIC is that the turn-off time for the inductive load is reduced to two-thirds that of a conventional IPIC. This is achieved by increasing the absolute value of the sustained negative output voltage from -18 V to -34 V. This new IPIC is useful for high-side solenoid drivers frequently used in automotive electronics.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126803110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Reliability of thick Al wire bonds in IGBT modules for traction motor drives 牵引电机驱动IGBT模块中粗铝丝键合的可靠性
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515076
J. Onuki, M. Koizumi
{"title":"Reliability of thick Al wire bonds in IGBT modules for traction motor drives","authors":"J. Onuki, M. Koizumi","doi":"10.1109/ISPSD.1995.515076","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515076","url":null,"abstract":"Reliability of thick Al wire bonds during the thermal fatigue test has been investigated from a metallurgical viewpoint. The bond interface between Al wires and Al-Si films was found to be a coincidence boundary or a boundary with very fine grain size, and hence so strong that cracks advanced along the grain boundary of the wire at the bonding interface in the accelerated thermal fatigue test. It was also found that crack growth rate could be reduced considerably by enlarging the grain size at the interface. The hypothesis that bonds would not degrade in actual use of traction motor drives was presented on the basis of the fatigue theory of Al.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"200 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116152919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 91
ICBRT-an isolated channel base resistance controlled thyristor 隔离通道基极电阻控制晶闸管
Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95 Pub Date : 1995-05-23 DOI: 10.1109/ISPSD.1995.515028
V. Parthasarathy, A. Bhalla, T. Chow
{"title":"ICBRT-an isolated channel base resistance controlled thyristor","authors":"V. Parthasarathy, A. Bhalla, T. Chow","doi":"10.1109/ISPSD.1995.515028","DOIUrl":"https://doi.org/10.1109/ISPSD.1995.515028","url":null,"abstract":"A novel 550 V MOS-gated thyristor structure called the Isolated Channel Base Resistance Controlled Thyristor (ICBRT) is proposed in this paper. This new structure incorporates a p+ diffusion adjacent to the p-base of the conventional Base Resistance Controlled Thyristor (BRT) to improve its turn-off capability. The desirable gate controlled turn-on and turn-off features of the BRT are retained in the ICBRT along with separate turn-on and turn-off gates. A 70% improvement in the maximum controllable current density is predicted in numerical analysis and is confirmed by experimental measurements. This improvement is obtained with no sacrifice in device characteristics or process complexity.","PeriodicalId":200109,"journal":{"name":"Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125119492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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