Characteristics of an improved lateral emitter switched thyristor

Abstract

A new LEST (lateral emitter switched thyristor) structure is proposed and experimentally verified. The structure differs from the conventional LEST in that it embeds a floating ohmic contact between the n-drift region and the n+ floating emitter. Both simulation and experimental results show that the device has an enhanced turn-on capability compared with the conventional LEST without deteriorating the other characteristics. The device is fabricated using a 3 /spl mu/m CMOS process to have a 320 V breakdown and 0.7 V threshold voltage. Thyristor turn-on is observed at an anode current density of 12.5 A/cm/sup 2/ with 5 V gate voltage. The maximum MOS controllable current density is in excess of 200 A with 5 V gate voltage.