Microelectronic Engineering最新文献

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A novel evaluation method of the aging performance of MEMS flow sensor MEMS 流量传感器老化性能的新型评估方法
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-22 DOI: 10.1016/j.mee.2024.112231
{"title":"A novel evaluation method of the aging performance of MEMS flow sensor","authors":"","doi":"10.1016/j.mee.2024.112231","DOIUrl":"10.1016/j.mee.2024.112231","url":null,"abstract":"<div><p>The development of Micro Electro Mechanical Systems (MEMS) flow sensor towards high level market applications generates various challenges, in particular also on the reliable functionality. With the advancement of reliability engineering technology, aging phenomenon of MEMS devices has been widely concerned. As a result, an aging evaluation method is essential. The accelerated aging testing (AAT) is the most widely used in traditional aging methods. However, its performance is limited by highly economic and time cost. In this paper, a novel aging effect model is proposed, in which a comprehensive approach that integrates AAT, lifetime distribution modeling, and either Finite Element Modeling Simulation (FEMS) or fatigue simulation (FS) as fundamental is explored. However, the difference from the conventional approach was that the AAT results is imported in FS, to confirm fatigue analysis, while FS predictions are instrumental in analyzing degradation or fatigue phenomena and estimation lifetime. In this way, aging performance is illustrated detailed with the lower aging cost and high efficiency. Meanwhile, the results of proposed FS are verified by a thermal cycle (TC) AAT. Specifically, the resistor degradation mechanism, the characteristic parameter degradation is calculated. Moreover, the lifetime evaluation was acquired by the Arrhenius model. Finally, the proposed aging performance evaluation method can be applied to both discrete devices and modules. Compared with the traditional aging method the high aging cost can be eliminated, and the proposed aging evaluation strategy can be used in various temperature conditions.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141736744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The effect of switching and cycle-to-cycle variations of RRAM on 4-bit encryption/decryption process RRAM 的开关和周期变化对 4 位加密/解密过程的影响
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-17 DOI: 10.1016/j.mee.2024.112244
{"title":"The effect of switching and cycle-to-cycle variations of RRAM on 4-bit encryption/decryption process","authors":"","doi":"10.1016/j.mee.2024.112244","DOIUrl":"10.1016/j.mee.2024.112244","url":null,"abstract":"<div><p>The resistive RAM (RRAM) based in-memory computation is a promising technology to overcome the Von-Neumann bottleneck to provide fast and efficient computation. The RRAM is the most appropriate choice for cryptographic applications like encryption/decryption in which the data is computed and stored in the memory itself which enhances the security. The variability issue of RRAM namely switching or device parameter variations and cycle-to-cycle variations deteriorates the functionality of RRAM based circuits. In this paper, the XOR gate with V/R-R logic and a 4-bit encryption/decryption process are implemented using the RRAM Stanford model integrated in the Cadence circuit simulator. The output voltage variations of XOR gate and the encryption/decryption by varying switching and cycle-to-cycle parameters are analyzed. The range of switching parameters of the model that provides the accurate outputs of XOR gate and encryption/decryption is determined.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141770871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Mask defect detection by combining wiener deconvolution and illumination optimization 结合维纳解卷积和照明优化进行掩膜缺陷检测
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-15 DOI: 10.1016/j.mee.2024.112245
{"title":"Mask defect detection by combining wiener deconvolution and illumination optimization","authors":"","doi":"10.1016/j.mee.2024.112245","DOIUrl":"10.1016/j.mee.2024.112245","url":null,"abstract":"<div><p>In the lithography process, mask defect is inevitably replicated on chips hence the yield and quality of the product are directly related to the mask quality. Mask microscopy resolution is then an essential specification. In this work, a high-efficiency method for enhancing the resolution of mask defect is proposed based on illumination optimization and Wiener deconvolution. To validate this approach, we established a verification apparatus designed to achieve a theoretical resolution of 3.0 μm with visible light. Remarkably, the empirical results demonstrated that the actual resolution attained is as low as 2.5 μm. The verification demonstrates a significant improvement for various periodic fringes. Moreover, the augmented capability of the apparatus facilitates the identification of mask defects. Although the experiment is carried out for the visible wavelength, the research is specifically designed for the working conditions suitable for EUV mask detection based on the preparatory work for the EUV.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S016793172400114X/pdfft?md5=67621d3a1e265d22316b27b27cff04b9&pid=1-s2.0-S016793172400114X-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141638271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
All-2D materials-based 1T1M cells with threshold switching for electronic neurons 基于全二维材料的 1T1M 细胞,具有电子神经元的阈值开关功能
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-15 DOI: 10.1016/j.mee.2024.112247
{"title":"All-2D materials-based 1T1M cells with threshold switching for electronic neurons","authors":"","doi":"10.1016/j.mee.2024.112247","DOIUrl":"10.1016/j.mee.2024.112247","url":null,"abstract":"<div><p>Two-dimensional (2D) materials may be used to fabricate electronic devices and circuits with enhanced electronic properties. Memristors made of hexagonal boron nitride (h-BN) have shown potential for many applications; however, in most cases they are tested using the current limitation tool of the semiconductor parameter analyzer, which does not match real circuit implementations and produces current overshoots. In this article, we present the first all-2D materials-based one-transistor- one-memristor (1T1M) cells exhibiting threshold-type RS. We connect 4 μm<sup>2</sup> molybdenum disulfide (MoS<sub>2</sub>) transistors in series with 0.3 μm<sup>2</sup> h-BN memristors, leading 1T1M cells able to self-limiting the current. The switching is observed at low voltages below 1 V for &gt;1000 cycles. Our results are a step forward towards the use of 2D materials in electronic devices and circuits.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141689281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Memristor-based input delay reservoir computing system for temporal signal prediction 基于 Memristor 的输入延迟蓄水池计算系统,用于时间信号预测
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-13 DOI: 10.1016/j.mee.2024.112240
{"title":"Memristor-based input delay reservoir computing system for temporal signal prediction","authors":"","doi":"10.1016/j.mee.2024.112240","DOIUrl":"10.1016/j.mee.2024.112240","url":null,"abstract":"<div><p>Reservoir computing (RC) system, featured by its recursive structure, has been utilized for temporal signal processing, offering both low power consumption and high computational speed. This work reports on a novel input delay reservoir computing (ID-RC) system based on the oxide memristors, which can be applied to temporal signal prediction. The particle swarm optimization (PSO) algorithm is employed in the ID-RC system to obtain optimal hyperparameters for multi-step prediction in the Mackey-Glass task, with a normalized root-mean-square error (NRMSE) of only 0.09 at the 20th step. Significantly, by employing the ID-RC system in temporal signal prediction of the Hénon map and the nonlinear autoregressive moving average (NARMA10), small NRMSEs of 0.047 and 0.017 were achieved, respectively. The memristor-based ID-RC system turns out to be highly promising in forecasting of chaotic time series.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141622418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Subthreshold read operations in 3D PCM: 1S1R device modeling and memory array analysis 3D PCM 中的阈下读取操作:1S1R 器件建模和存储器阵列分析
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-13 DOI: 10.1016/j.mee.2024.112211
Qiuyao Yu , Guangming Zhang , Yu Lei , Xinyu Yang , Houpeng Chen , Qian Wang , Zhitang Song
{"title":"Subthreshold read operations in 3D PCM: 1S1R device modeling and memory array analysis","authors":"Qiuyao Yu ,&nbsp;Guangming Zhang ,&nbsp;Yu Lei ,&nbsp;Xinyu Yang ,&nbsp;Houpeng Chen ,&nbsp;Qian Wang ,&nbsp;Zhitang Song","doi":"10.1016/j.mee.2024.112211","DOIUrl":"https://doi.org/10.1016/j.mee.2024.112211","url":null,"abstract":"<div><p>3-D phase change memory (PCM) is one of the most promising next-generation nonvolatile memory, and the subthreshold sensing strategy can effectively improve its limited endurance. In this study, we propose a one-selector-one-resistor (1S1R) model with Monte Carlo (MC) function and provide array configurations for the worst case and the maximum bit line voltage (<em>V</em><sub><em>BL-max</em></sub>), respectively. Based on these, the read window margin (RWM) is evaluated with various array sizes, OTS threshold voltage variations (<span><math><msub><mi>σ</mi><mi>var</mi></msub></math></span>), and bias voltages (<em>V</em><sub><em>Bias</em></sub>). Our results reveal that the RWM increases as the <em>V</em><sub><em>BL</em></sub> approaches the <em>V</em><sub><em>BL-</em>max</sub>. Larger arrays lead to an increased leakage current difference, while larger <span><math><msub><mi>σ</mi><mi>var</mi></msub></math></span> values result in decreased cell current difference and <em>V</em><sub><em>BL-</em>max</sub>. The decrease in <em>V</em><sub><em>BL-max</em></sub> further deteriorates the RWM. Additionally, we analyze the optimal <em>V</em><sub><em>Bias</em></sub> for 2-deck arrays achieves a 7% reduction in leakage energy consumption and a 22.6% increase in RWM compared to the V/2 bias. The optimal <em>V</em><sub><em>Bias</em></sub> depends on OTS devices and array sizes.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141607081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrical characteristics of Si0.7Ge0.3/Si heterostructure-based n-type GAA MOSFETs 基于 Si0.7Ge0.3/Si 异质结构的 n 型 GAA MOSFET 的电气特性
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-13 DOI: 10.1016/j.mee.2024.112226
Pushp Raj , Kuei-Shu Chang-Liao , Pramod Kumar Tiwari
{"title":"Electrical characteristics of Si0.7Ge0.3/Si heterostructure-based n-type GAA MOSFETs","authors":"Pushp Raj ,&nbsp;Kuei-Shu Chang-Liao ,&nbsp;Pramod Kumar Tiwari","doi":"10.1016/j.mee.2024.112226","DOIUrl":"https://doi.org/10.1016/j.mee.2024.112226","url":null,"abstract":"<div><p>Electrical characteristics of Si<sub>0.7</sub>Ge<sub>0.3</sub>/Si heterostructure-based n-type gate-all-around MOSFETs (GAA MOSFETs) are reported in this work through experimental and numerical simulation data. N-type GAA MOSFETs of varying lengths (60 nm to 160 nm) and widths (20 nm to 42 nm) are fabricated and measured to extract key electrical parameters like ON current, ON-to-OFF current ratio, threshold voltage, DIBL, and subthreshold swing. Moreover, the influence of tensile strain on carrier transport parameters in the buried Si layer is examined in this work. The Ge mole fraction in SiGe is raised from 0.2 to 0.3, and the corresponding changes in XX-stress, and current density are analyzed using a TCAD simulator. The performance of the proposed device has also been compared with unstrained SiGe/Si, all Si, and SiGe-based GAA MOSFETs.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141607083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Large-scale growth of MoS2 hybrid layer by chemical vapor deposition with nanosheet promoter 利用纳米片促进剂通过化学气相沉积大规模生长 MoS2 混合层
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-13 DOI: 10.1016/j.mee.2024.112239
{"title":"Large-scale growth of MoS2 hybrid layer by chemical vapor deposition with nanosheet promoter","authors":"","doi":"10.1016/j.mee.2024.112239","DOIUrl":"10.1016/j.mee.2024.112239","url":null,"abstract":"<div><p>Molybdenum disulfide (MoS<sub>2</sub>) serves as the representative transition metal dichalcogenide material, showing promise for diverse applications owing to its outstanding properties. Extensive research has been conducted on the growth of large-scale MoS<sub>2</sub> films using chemical vapor deposition (CVD) with seeding accelerators for various device applications. In this study, we investigated the growth of large-scale MoS<sub>2</sub> films for potential applications, in which our approach utilized CVD with a homogeneous nanosheet promoter (MoS<sub>2</sub> flakes) and effectively minimized residue creation. Optical and structural analyses confirmed the successful synthesis of a large-scale MoS<sub>2</sub> layer. Moreover, the decoration of metallic nanoparticles on the MoS<sub>2</sub> surface was employed to enhance the functionalities of application devices such as optical sensors and gas sensors. The capability of MoS<sub>2</sub> to act as a nucleation site for nanoparticles during synthesis offered an intriguing pathway for augmenting the attachment and performance of nanoparticles on the MoS<sub>2</sub> surface. The photodetector, integrating a hybrid MoS<sub>2</sub> layer and Cu nanoparticles, exhibited superior photodetection properties, attributed to the increased excitons at the interface between the metal electrodes and MoS<sub>2</sub> films. Furthermore, in order to enhance the characteristics of the gas sensor, Pd nanoparticles were incorporated during the synthesis of MoS<sub>2</sub> layers. This dynamic interface between Pd particles and MoS<sub>2</sub> films presents an opportunity to explore novel materials with enhanced catalytic properties.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S0167931724001084/pdfft?md5=49a56c3d40161a07f961c036b291712e&pid=1-s2.0-S0167931724001084-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141622419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Dependence of frequency-temperature stability on support tethers in dual-beam piezoresistive sensing MEMS resonators 双束压阻传感 MEMS 谐振器中频率-温度稳定性与支撑系绳的关系
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-07-10 DOI: 10.1016/j.mee.2024.112241
{"title":"Dependence of frequency-temperature stability on support tethers in dual-beam piezoresistive sensing MEMS resonators","authors":"","doi":"10.1016/j.mee.2024.112241","DOIUrl":"10.1016/j.mee.2024.112241","url":null,"abstract":"<div><p>This paper investigates the dependence of frequency stability over temperature on support tethers in dual-beam piezoresistive length-extensional (LE) mode microelectromechanical systems (MEMS) resonators. The designed dual-beam resonator consists of two identical single-crystal silicon beams, which are mechanically coupled and excited into vibrating in opposite phase to eliminate the inherent capacitive feedthrough signals. Both straight and folded beams are adopted as the support tethers for the reported dual-beam piezoresistive resonators. Quality factor (<em>Q</em>) and temperature distribution across the resonators with various support tethers are investigated by finite element method (FEM) analysis. It is found that folded beam tethers can reduce the support loss and hence improve the <em>Q</em> for the designed dual-beam resonator, while it comes with a tradeoff of high temperature rise on resonator body. The reported dual-beam resonator with straight beam tethers has low temperature rise on the resonator body, which is less sensitive to environmental temperature fluctuations, compared to its counterpart with folded beam tethers. Experimental results show that the fabricated dual-beam piezoresistive resonator with four straight beam tethers achieves a 0.5 ppm frequency shifts in the temperature-control chamber, which is nearly four times better than those with folded beam tethers.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141638272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A synoptic review of nanoscale vacuum channel transistor: Fabrication to electrical performance 纳米级真空沟道晶体管综述:从制造到电气性能
IF 2.6 4区 工程技术
Microelectronic Engineering Pub Date : 2024-06-29 DOI: 10.1016/j.mee.2024.112230
{"title":"A synoptic review of nanoscale vacuum channel transistor: Fabrication to electrical performance","authors":"","doi":"10.1016/j.mee.2024.112230","DOIUrl":"10.1016/j.mee.2024.112230","url":null,"abstract":"<div><p>The vacuum channel transistor has emerged as a promising candidate for next-generation technology due to its intriguing features compared to the conventional field effect transistor. Nanoscale vacuum channel transistors have a particular advantage due to the promise of vacuum-like ballistic transport, radiation insensitivity, and nanoscale dimensions. Unlike field emission devices, nanoscale vacuum channel transistors can induce electron emission at a desired temperature; sharp and thin emitters on the cathode are desired to increase field emission. This article provides a comprehensive overview of recent research advancements. It begins with a brief introduction to vacuum transistors and their miniaturization to the nanoscale. Then, recent advancements in different architectures with vacuum gaps, including their physical properties, fabrication methods, and device applications, are discussed. Finally, this review concludes by highlighting some challenges and perspectives in this emerging field.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":null,"pages":null},"PeriodicalIF":2.6,"publicationDate":"2024-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141587303","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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