Microelectronic Engineering最新文献

{"title":"Simulations of X-ray focusing by zone plates in rotationally symmetric optical field utilizing the matrix-free Finite Difference Beam Propagation Method","authors":"Hao Quan,&nbsp;Xujie Tong,&nbsp;Qingxin Wu,&nbsp;Qiucheng Chen,&nbsp;Yifang Chen","doi":"10.1016/j.mee.2024.112278","DOIUrl":"10.1016/j.mee.2024.112278","url":null,"abstract":"<div><div>We present the use of a finite difference method based on Crank-Nicholson scheme and recurrence scheme for computationally efficient simulation of the X-ray propagation through a zone plate. By introducing boundary and central conditions and by avoiding large matrix operations, the method achieves considerable speed, little memory occupation and low background noise. Accommodating refractive index profiles of arbitrary shape, it can be applied to assist optimizing X-ray zone plates and understanding focusing mechanism.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"295 ","pages":"Article 112278"},"PeriodicalIF":2.6,"publicationDate":"2024-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142535231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Electron trapping in HfO2 layer deposited over a HF last treated silicon substrate","authors":"L. Sambuco Salomone ,&nbsp;M.V. Cassani ,&nbsp;M. Garcia-Inza ,&nbsp;S. Carbonetto ,&nbsp;E. Redin ,&nbsp;F. Campabadal ,&nbsp;A. Faigón","doi":"10.1016/j.mee.2024.112277","DOIUrl":"10.1016/j.mee.2024.112277","url":null,"abstract":"<div><div>Electron trapping in HfO₂-based MOS structures was studied through pulsed capacitance-voltage (C-V) technique. 10 nm HfO₂ layer was deposited by atomic layer deposition over a HF last treated Si substrate. The C-V curves were observed to shift to positive voltages driven by the positive applied voltage along the pulses, consistent with electron trapping due to tunneling transitions between the substrate and pre-existing defects within the oxide and the subsequent lattice relaxation through electron-phonon interaction. The dependences of the voltage shift for a given capacitance value (<em>ΔV</em>_<em>C</em>) with stress bias and time, allowed to distinguish two mechanisms. An initial trapping process occurs for times shorter than the microsecond, probably associated with a thin non-stoichiometric SiO_x interfacial layer, which is followed by a trapping process that starts after tens of μs and progressively slowed down, associated with traps within the HfO₂ layer. Numerical simulations yield for the HfO₂ traps an energy of 1.3 eV below the conduction band edge, decreasing exponentially with the distance from the Si interface with a characteristic length of 1.7 nm; and phonon and relaxation energies of 50 meV and 1 eV, respectively. These physical parameters are consistent with previous reports of electron trapping in HfO₂ layers deposited on a controlled interfacial layer, suggesting that trapping properties of defects inside the HfO₂ layer are insensitive to the treatment of the Si surface before HfO₂ deposition. On the other hand, the observed large initial trapping suggests that the non-controlled SiO_x interfacial region is more defective than a controlled one.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"295 ","pages":"Article 112277"},"PeriodicalIF":2.6,"publicationDate":"2024-10-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142442774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Design of Superlattice Ferroelectric-Metal Field-effect Transistor for triple-level cell 3D NAND flash","authors":"Sola Woo ,&nbsp;Gihun Choe ,&nbsp;Asif Islam Khan ,&nbsp;Suman Datta ,&nbsp;Shimeng Yu","doi":"10.1016/j.mee.2024.112276","DOIUrl":"10.1016/j.mee.2024.112276","url":null,"abstract":"<div><div>Superlattice ferroelectric-metal field-effect transistor (SL-FeMFET) based three-dimensional NAND architecture (3D NAND) is investigated for triple-level cell (TLC) operations. The SL-FeMFET shows a novel approach for designing the gate-stack using a superlattice of ferroelectric/dielectric/ferroelectric for achieving large memory window ∼3.48 V with program/erase voltage ±7 V for 3D NAND architecture. By TCAD modeling, we demonstrate TLC operation of SL-FeMFET with improving memory window and alleviating variability caused by floating metal layer in FeMFET structure. In addition, as the vertical gate stack increases from 256-layer to 512-layer, the read-out current with worst cases in seven read operations for TLC sensing are examined using page buffer circuit for sensing operation. The simulation results suggest that SL-FeMFET based 3D NAND architecture can operate 512-layer with sufficient sense margin for TLC operation.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"295 ","pages":"Article 112276"},"PeriodicalIF":2.6,"publicationDate":"2024-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142318864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Optimizing dose parameters for enhanced maskless lithography in MoS2-based devices","authors":"Hyun Min Park,&nbsp;Hyeon Woo Park,&nbsp;Muhammad Suleman,&nbsp;Minwook Kim,&nbsp;Sunil Kumar,&nbsp;Yongho Seo","doi":"10.1016/j.mee.2024.112275","DOIUrl":"10.1016/j.mee.2024.112275","url":null,"abstract":"<div><div>Maskless lithography simplifies the fabrication process and reduces costs compared to electron beam (<em>E</em>-beam) lithography, making it a more efficient choice for patterning nano-devices. Maskless lithography presents a promising avenue for expediting device fabrication by eliminating the need for masks. This technique can streamline the production of basic electronic devices, offering an efficient and low-cost alternative to traditional lithographic methods, like <em>E</em>-beam lithography. This study utilized a 405 nm photodiode to achieve pattern-writing with a minimum linewidth of 1 μm. Exploring optimal parameters includes adjustments in beam intensity, scan speed, and step size. Maskless lithography was applied to 2D transition metal dichalcogenides (TMDCs) material, MoS₂, to investigate their electrical transport characteristics. The fabricated device exhibits an ON/OFF ratio of ∼1.7 × 10⁶ and a mobility of ∼0.833 cm²/V·s, indicating a high switching efficiency. The results demonstrate optimized maskless lithography's potential for swift and cost-effective fabrication, offering intermediate-resolution patterning capabilities.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"295 ","pages":"Article 112275"},"PeriodicalIF":2.6,"publicationDate":"2024-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142314978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High density nanofluidic channels by self-sealing for metallic nanoparticles detection","authors":"Wentao Yuan ,&nbsp;Qingxin Wu ,&nbsp;Shuoqiu Tian ,&nbsp;Jinyu Guo ,&nbsp;Kangping Liu ,&nbsp;Yifang Chen","doi":"10.1016/j.mee.2024.112264","DOIUrl":"10.1016/j.mee.2024.112264","url":null,"abstract":"<div><p>High density nanofluidic channels were successfully fabricated by a novel process, nicknamed as self-sealing process, for the detection of metal nanoparticles dispersed in water using color changes excited by polarized electromagnetic waves. The permittivities of aqueous solutions with various concentrations of metal nanoparticles were calculated by a corrected plasma model. Systematic simulations using finite difference time domain method were carried out in investigating the detection capabilities of the nanofluidic channels for silver, beryllium and copper nanoparticles in water. The pronounced color shifts indicates that the channels possess high sensitivity in the metal nanoparticles detection. The designed nanofluidic channels were then fabricated by a direct flood deposition of a silica film on a pre-replicated hydrogen silsesquioxan (HSQ) grating using electron beam lithography (EBL). The self-sealing technique possesses advantages in simplified processing, encapsulation free and potential of multi-layer nanochannels.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"294 ","pages":"Article 112264"},"PeriodicalIF":2.6,"publicationDate":"2024-09-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S0167931724001333/pdfft?md5=7919c785cd0adb4939d756d37e60990d&pid=1-s2.0-S0167931724001333-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142163358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Etch of nano-TSV with smooth sidewall and excellent selection ratio for backside power delivery network","authors":"Yang Wang ,&nbsp;Ziyu Liu ,&nbsp;Yabin Sun ,&nbsp;Lin Chen ,&nbsp;Qingqing Sun","doi":"10.1016/j.mee.2024.112265","DOIUrl":"10.1016/j.mee.2024.112265","url":null,"abstract":"<div><p>Backside Power Delivery Network (BSPDN) is a crucial technology for integrated circuits at sub-3 nm technology nodes. The primary challenge resides in utilizing nano through silicon via (nano-TSV) to establish connections between the backside power network and buried power rails, thereby facilitating transistor powering. The key technology is to ensure a smooth sidewall morphology and prevent damage to buried power rails (BPR) due to over-etching. In this study, non-Bosch and Bosch techniques are compared using simulation. The results demonstrate that while the non-Bosch technique yields smooth sidewalls, it inevitably leads to over-etching, whereas Bosch effectively avoids over-etching. The etching of scallop-free nano-TSV is achieved by optimizing the Bosch process, which involves the use of inductively coupled plasma (ICP). Finally, metal filling of nano-TSV is successfully achieved. Thus, the nano-TSV etching method is established as viable for BSPDN.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"295 ","pages":"Article 112265"},"PeriodicalIF":2.6,"publicationDate":"2024-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142266227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development of an emulator of the sustainable energy harvesting pad system on a bike lane for charging lithium batteries","authors":"Kazi Meharajul Kabir,&nbsp;Shuza Binzaid","doi":"10.1016/j.mee.2024.112262","DOIUrl":"10.1016/j.mee.2024.112262","url":null,"abstract":"<div><p>In response to the urgent imperative of combating global warming and advancing sustainable energy solutions, an innovative approach has emerged, capitalizing on bicycles and road bike lane infrastructure. This solution integrates a Smart Lithium Battery Charging System with a Sustainable Energy Harvesting Pad (SEHP) designed for cyclists. The SEHP harnesses piezoelectric energy from mechanical vibrations and kinetic energy from lightweight vehicles. It produces clean, renewable electricity as an alternative to traditional power sources. Comprehensive assessments of the SEHP's energy generation performance at various proficiency levels have revealed impressive capabilities. An electronic emulator system is developed to support academic and research communities, simulating scenarios on bike lanes to efficiently charge 36.36 Wh lithium batteries at various cycling proficiency levels. The study involved specific circuit design, seamless integration with the custom Smart Lithium Battery Charging System, and optimization using Microcontroller hardware and software solutions. Practical prototypes verified the emulator's functionality and real-world applicability, making it an authentic replica of the SEHP's outcomes. This innovative technology enhances our understanding of SEHP and enables comparative analysis against other energy sources, contributing to a more sustainable future.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"294 ","pages":"Article 112262"},"PeriodicalIF":2.6,"publicationDate":"2024-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142076794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Wide scan angle multibeam conformal antenna array with novel feeding for mm-wave 5G applications","authors":"Amir Mohsen Ahmadi Najafabadi ,&nbsp;Faruk Ballipinar ,&nbsp;Melih Can Tasdelen ,&nbsp;Abdulkadir Uzun ,&nbsp;Murat Kaya Yapici ,&nbsp;Anja Skrivervik ,&nbsp;Ibrahim Tekin","doi":"10.1016/j.mee.2024.112261","DOIUrl":"10.1016/j.mee.2024.112261","url":null,"abstract":"<div><p>This paper presents a low-profile wide scan angle multibeam conformal antenna array system with a novel feeding network for <span><math><mn>28</mn></math></span> GHz mm-wave 5G applications. The proposed antenna system utilizes two conventional branch-line couplers as its beamforming network. A novel feeding technique is applied to generate <span><math><mn>7</mn></math></span> beams with these couplers that are usually capable of generating <span><math><mn>2</mn></math></span> beams. The proposed solution provides a wide scanning range with a minimum realized gain of <span><math><mn>5</mn></math></span> dBi from <span><math><mo>−</mo><msup><mn>90</mn><mo>°</mo></msup></math></span> to <span><math><msup><mn>90</mn><mo>°</mo></msup></math></span> owing to this feeding approach and the peculiar placement of the array elements on a <span><math><mn>0.15</mn></math></span> mm thick R-F775 bendable substrate. The generated beams at their steer direction have the minimum and maximum gain values of <span><math><mn>6.5</mn></math></span> dBi and <span><math><mn>9.7</mn></math></span> dBi, respectively. A low-cost PCB manufacturing technique based on soft lithography and wet etching is used. The system dimensions excluding extra connector sections are <span><math><mn>67</mn><mo>×</mo><mn>15</mn><mo>×</mo><mn>3</mn><mspace></mspace><msup><mi>mm</mi><mn>3</mn></msup></math></span>. The proposed flexible design is suitable for lightweight 5G communication systems and handsets with its compact low-complexity beamforming network, and wide <span><math><msup><mn>180</mn><mo>°</mo></msup></math></span> continuous covering angle.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"294 ","pages":"Article 112261"},"PeriodicalIF":2.6,"publicationDate":"2024-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142083477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development of an ultra-clean sample heating stage for thermal desorption spectroscopy","authors":"Xiaoyu Zou,&nbsp;Matthew Fisher,&nbsp;Hugh Gotts","doi":"10.1016/j.mee.2024.112257","DOIUrl":"10.1016/j.mee.2024.112257","url":null,"abstract":"<div><p>Control of surface molecular contamination (SMC) for components used in chemical vapor deposition (CVD), atomic layer deposition (ALD) and EUV photolithography is important to maintaining high yield and optimal tool operation at the latest process nodes in leading edge semiconductor manufacturing. High temperature thermal desorption spectroscopy (TDS) is a versatile tool for analyzing the cleanliness of surfaces, simulating thermal vacuum processes and studying the kinetics of desorption processes. A basic analysis of TD spectra allows for full characterization of volatile outgassing from surfaces, while detailed analysis can provide chemical information about the substrate surface.</p><p>In fundamental studies, TDS is often carried out from low temperatures to room temperature or for small samples. However, for microelectronics applications, high temperature studies of large (100 mm or greater) samples are of greater interest due to direct applications for cleanliness testing and thermal vacuum simulation. A limitation for TDS sensitivity is the outgassing of sample stage materials, particularly when analyzing gases that may be present in the chamber background such as water, CO and CO₂. Typical sample stages are often tested only for total pressure or at room temperature.</p><p>In this study, we present a simple ultra-high vacuum (UHV) compatible sample heating stage for trace outgassing analysis of 100 mm samples at high temperatures. Simulation results are presented to support the feasibility of the concept. Experimental results verify the cleanliness of the stage via room temperature residual gas analysis (RGA) analysis and X-ray photoelectron spectroscopy (XPS) of stage components. Finally, use of this stage in a TDS analysis of a 100 mm Si witness wafer and comparison to room temperature RGA demonstrates operational capability.</p><p>The sample heating stage is both shown to be clean at high temperature and capable of analyzing 100 mm wafers to higher sensitivity than room temperature RGA for all <em>m</em>/<em>z</em> at the 1 × 10⁻⁹ mbar level. Despite its high performance, the heating stage is also easily produced by any laser machining service, greatly improving the accessibility of UHV science for all researchers.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"294 ","pages":"Article 112257"},"PeriodicalIF":2.6,"publicationDate":"2024-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142044453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Nanocomposite filled slots that enhance radiation of flexible nonagon antenna","authors":"Abhilash S. Vasu ,&nbsp;T.K. Sreeja ,&nbsp;N.R. Lakshmi","doi":"10.1016/j.mee.2024.112258","DOIUrl":"10.1016/j.mee.2024.112258","url":null,"abstract":"<div><p>The new radiator incorporated with nanocomposites improve radiation characteristics of nonagon shaped antenna. The design comprise two nanocomposite materials loaded in slots that separately enhance lower and upper band radiation. The CPW antenna consists of nonagon shaped ring with heptagon radiating element that consists of inverted U and rigid shaped slots. The longer slot has been deliberately chosen to accommodate mid-frequency of two resonance frequencies and shorter slot isolates surface current distributed along radiating patch, left and right side. The Poly (3, 4 ethyelene dioxythiophene): Polystyrene Sulfonate-Silver nanowire (PEDOT:PSS-AgNW) nanocomposite filled in shorter slot improves gain, bandwidth and return loss of upper band, magnetite - Polyaniline (Fe₃O₄-PANI) filled in longer slot enhance lower band. The measured result proved to improve bandwidth, gain, radiation efficiency and polarization of lower, upper band. The flexible attributes of radiator studied extensively by wearable application by placing them on wrist and jeans. The fabricated antenna produce a bandwidth of 2.12–3.29 GHz in lower band, 4.51–6.00 GHz in upper band for 2.40/5.20/5.80 GHz WLAN, 2.50/5.50 GHz WiMAX, 2.40/4.90/5.20/5.50/5.80 GHz WiFi, 5G SUB-6 GHz and ISM bands.</p></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"294 ","pages":"Article 112258"},"PeriodicalIF":2.6,"publicationDate":"2024-08-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142097213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}