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Electrical Performance of Electronic Packaging - 2004最新文献

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2.5 Gbps Infiniband copper cable interconnect compliance 2.5 Gbps ib铜缆互连兼容性
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407548
I. Birkeli
{"title":"2.5 Gbps Infiniband copper cable interconnect compliance","authors":"I. Birkeli","doi":"10.1109/EPEP.2004.1407548","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407548","url":null,"abstract":"This work puts a focus on the problems facing a board designer when implementing 2.5 Gbps Infiniband board to board electrical interconnect via a copper cable. To be compliant to specification, in low-cost, high volume packaging, using standard FR4 PCB technology, may be a great challenge.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131002422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Efficient generation of closed-form expressions for interconnect networks using parameterized model-reduction techniques 利用参数化模型约简技术高效生成互连网络的封闭形式表达式
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407602
A. Jerome, P. Gunupudi, R. Khazaka, M. Nakhla
{"title":"Efficient generation of closed-form expressions for interconnect networks using parameterized model-reduction techniques","authors":"A. Jerome, P. Gunupudi, R. Khazaka, M. Nakhla","doi":"10.1109/EPEP.2004.1407602","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407602","url":null,"abstract":"Increased levels of integration and increase in operating frequencies have highlighted interconnect effects previously neglected during circuit simulation. Accurate prediction of these effect involve solution of large system of equations, direct simulation of which, is prohibitively expensive. In this paper, we propose an efficient algorithm to form closed-form expressions for the response of interconnect networks as a function of any design parameter in the network. This is achieved by the use of parameterized model reduction techniques in conjunction with a popular rational approximation algorithm, vector-fit. The proposed algorithm was applied to transmission line networks and a significant speed-up was achieved.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129034229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Modeling of transmission lines with textured ground planes and investigation of data transmission by generating eye diagrams 具有纹理地平面的输电线路建模和通过生成眼图来研究数据传输
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407584
J.C.W. Ho, Quanyan Zhu, R. Abhari
{"title":"Modeling of transmission lines with textured ground planes and investigation of data transmission by generating eye diagrams","authors":"J.C.W. Ho, Quanyan Zhu, R. Abhari","doi":"10.1109/EPEP.2004.1407584","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407584","url":null,"abstract":"In this work, data transmission in transmission lines containing textured ground planes in the power distribution network is investigated. A lumped element model is developed to generate eye diagrams and circuit simulations are compared with measurements. A circuit model for a transmission line with an EBG ground plane is introduced. The circuit model for the EBG structure is developed based on using LC components and considering each patch as a parallel-plate transmission line. This modeling strategy allows including two important features to the individual LC stages representing the EBG surface: coupling to the signal line, and transverse loading of adjacent patches in the EBG structure. The circuit model parameters are calculated by using closed-form relations and applying the physical dimensions of the structure-under-test. The proposed model is employed to generate the scattering-parameter graphs and eye diagrams, which are compared with full-wave simulations and measurements to ensure validation of the results in both frequency and time domains.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"400 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121803110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A surface equivalence-based method to enable rapid design and layout iterations of coupled electromagnetic components in integrated packages 一种基于表面等效的集成封装耦合电磁元件快速设计和布局迭代方法
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407542
S. Chakraborty, V. Jandhyala
{"title":"A surface equivalence-based method to enable rapid design and layout iterations of coupled electromagnetic components in integrated packages","authors":"S. Chakraborty, V. Jandhyala","doi":"10.1109/EPEP.2004.1407542","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407542","url":null,"abstract":"A novel methodology is presented that expedites the electromagnetic analysis in the design cycle of individual layout components in close proximity to other radiating and electromagnetic structures. The proposed method retains all the advantages of a surface based moment method technique, but avoids explicit modeling of the interactions between the object under design and the neighboring ones, without compromising on the accuracy of capturing the electromagnetic coupling between them. As a result, the simulation time in an individual design cycle is greatly reduced.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"292 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123744318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Compact 2D FDFD based full wave method for the extraction of RLGC parameters of general guided wave structures 基于紧凑二维FDFD的全波方法提取一般导波结构的RLGC参数
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407570
N. Orhanovic, D. Divekar, N. Matsui
{"title":"Compact 2D FDFD based full wave method for the extraction of RLGC parameters of general guided wave structures","authors":"N. Orhanovic, D. Divekar, N. Matsui","doi":"10.1109/EPEP.2004.1407570","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407570","url":null,"abstract":"A 2D full wave method for computing the frequency dependent RLGC parameters of general dispersive, dissipative guided wave structures is proposed. The method directly computes the modal fields and the complex propagation constant of the structure. The characterization of a mode in the form of its equivalent RLGC parameters makes the method particularly convenient for SPICE modeling. The method is based on the solution of a set of discretized Maxwell's equations formulated as a sparse complex general eigenvalue problem.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127009337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Extraction of frequency dependent characteristic transmission line parameters up to 20 GHz for global wiring in 90 nm SOI/Cu technology 在90纳米SOI/Cu技术中提取高达20 GHz的频率相关特征传输线参数
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407565
T. Winkel, M.F. Ktata, T. Ludwig, H. Grabinski, E. Klink
{"title":"Extraction of frequency dependent characteristic transmission line parameters up to 20 GHz for global wiring in 90 nm SOI/Cu technology","authors":"T. Winkel, M.F. Ktata, T. Ludwig, H. Grabinski, E. Klink","doi":"10.1109/EPEP.2004.1407565","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407565","url":null,"abstract":"S-parameter measurements were performed on special test lines embedded in an 8 copper metal layer test chip in order to determine the propagation constant y(f) and the complex characteristic impedance Z/sub 0/(f). Measurement results are presented for signal lines in the 7/sup th/ metal layer showing very good agreement with FEM-simulations in the frequency range up to 20 GHz.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"29 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132347988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Application of the enlarged cell method (ECM) to EMI/EMC problems 放大单元法(ECM)在EMI/EMC问题中的应用
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407626
Tian Xiao, Q. Liu, Jiangqi He
{"title":"Application of the enlarged cell method (ECM) to EMI/EMC problems","authors":"Tian Xiao, Q. Liu, Jiangqi He","doi":"10.1109/EPEP.2004.1407626","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407626","url":null,"abstract":"Conductors play an important role in the EMI/EMC problem. However, the conventional finite-difference time-domain (FDTD) method is known to produce significant staircasing errors when applied to conductors. In the past few years, many researchers have been using conformal FDTD methods to reduce this staircasing error. As a side effect, however, the time step size in these conformal FDTD (CFDTD) methods often becomes more restrictive because of the reduced effective grid size near the conductor boundary. An enlarged cell method is applied to solve EMI/EMC problems. We show that the ECM is highly accurate compared to the conventional FDTD method, and is three times faster than the conformal FDTD method because the time step size in ECM remains the same as in the FDTD method. Large-scale EMI/EMC problems have been solved with the ECM on a PC.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134496037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis of lossy packaging parasitics for common emitter LNA in system-on-package 系统上封装中共发射极LNA的损耗封装寄生分析
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407551
X. Duo, Lirong Zheng, M. Ismail, H. Tenhunen
{"title":"Analysis of lossy packaging parasitics for common emitter LNA in system-on-package","authors":"X. Duo, Lirong Zheng, M. Ismail, H. Tenhunen","doi":"10.1109/EPEP.2004.1407551","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407551","url":null,"abstract":"Advances of VLSI and packaging technologies enable condensed integration of an RF system in a single module, known as SoC and SoP. In order to find a better solution between SoC and SoP for RF systems and their sub-systems, it is needed to predict and estimate the performance of each solution. Analytical equations for noise figure and gain of inductively degenerated common-emitter low-noise amplifiers in SoP/SoC are deduced as functions of passives and packaging parasitics. They hence enable designers to evaluate overall performance of each solution quantitatively. Influence of lossy packaging parasitics on LNA is also analyzed.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114733977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Implementation of low jitter clock distribution using chip-package hybrid interconnection 采用芯片-封装混合互连实现低抖动时钟分配
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407614
Chunghyun Ryu, Daehyun Chung, Kicheol Bae, Jiheon Yu, Joungho Kim
{"title":"Implementation of low jitter clock distribution using chip-package hybrid interconnection","authors":"Chunghyun Ryu, Daehyun Chung, Kicheol Bae, Jiheon Yu, Joungho Kim","doi":"10.1109/EPEP.2004.1407614","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407614","url":null,"abstract":"As the clock frequency of digital systems goes higher up to multi-GHz, it is getting more important to distribute the clock signal to each destination with minimum timing jitter as not to exceed the timing margin of the system. For the lossy characteristic of on-chip interconnection lines, repeaters are indispensable to distribute the clock signal on a chip and the number of repeaters is increasing as clock frequency goes up for reliable signal quality. However, these kinds of repeaters can cause timing jitter on the clock signal when they are affected by power supply noise which is usually generated by logic core operation. This work shows a possible solution for the problem, that is, chip-package hybrid interconnection by which some repeaters are no longer necessary and verifies that the hybrid interconnection reduces clock jitter dramatically through implementation and measurement.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"314 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122093622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Macro-modeling of transistor level receiver circuits 晶体管级接收电路的宏观建模
Electrical Performance of Electronic Packaging - 2004 Pub Date : 2004-10-25 DOI: 10.1109/EPEP.2004.1407599
B. Mutnury, M. Swaminathan, M. Cases, N. Pham, D. de Araujo, E. Matoglu
{"title":"Macro-modeling of transistor level receiver circuits","authors":"B. Mutnury, M. Swaminathan, M. Cases, N. Pham, D. de Araujo, E. Matoglu","doi":"10.1109/EPEP.2004.1407599","DOIUrl":"https://doi.org/10.1109/EPEP.2004.1407599","url":null,"abstract":"A modeling methodology for macro-modeling transistor level receiver circuits has been proposed. A few receiver modeling techniques have been proposed in the past, but these modeling techniques only address the loading effect of the receiver circuits i.e., the input characteristics of the receivers. In this work, the proposed modeling approach addresses both the loading effect of the receiver as well as the output characteristics of the receiver. The proposed modeling technique is simple, accurate and has huge computational speed-up over transistor level receiver circuits. A recurrent neural network (RNN) model is used to model the loading effect of the receiver. The output characteristics of the receiver is modeled using a combination of receiver static characteristics and a delay element that takes into account the timing delay of the receiver. The accuracy of the modeling approach has been tested on a few test cases and results show good accuracy.","PeriodicalId":143349,"journal":{"name":"Electrical Performance of Electronic Packaging - 2004","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123975323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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