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2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)最新文献

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Design of monolithic silicon photonics at 25 Gb/s 25gb /s单片硅光子学设计
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240453
J. Orcutt
{"title":"Design of monolithic silicon photonics at 25 Gb/s","authors":"J. Orcutt","doi":"10.1109/CSICS.2017.8240453","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240453","url":null,"abstract":"Monolithic CMOS photonics seeks to minimize total transceiver cost by simplifying packaging, design and test. Here, I examine 25 Gb/s applications in commercially available process technology with a focus on receiver sub-system optimization.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124860917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 28 GHz 480 elements digital AAS using GaN HEMT amplifiers with 68 dBm EIRP for 5G long-range base station applications 采用GaN HEMT放大器和68 dBm EIRP的28ghz 480元数字AAS，用于5G远程基站应用
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240471
T. Kuwabara, N. Tawa, Yuichi Tone, T. Kaneko
{"title":"A 28 GHz 480 elements digital AAS using GaN HEMT amplifiers with 68 dBm EIRP for 5G long-range base station applications","authors":"T. Kuwabara, N. Tawa, Yuichi Tone, T. Kaneko","doi":"10.1109/CSICS.2017.8240471","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240471","url":null,"abstract":"This paper reports the design, development and performance of a 28 GHz 480 elements digital Active Antenna System (AAS) prototype for 5G long-range applications. AAS accommodates 32 channels of 0.15 um GaN HEMT power amplifier chains. The antenna array prototype consists of full digitally controlled 32 streams of 15 elements sub-arrays. They can deliver a total conductive power of 41 dBm and Average Effective Isotropically Radiated Power (EIRP) of 68 dBm for the macro-cell coverage at 28 GHz. The prototype also features newly proposed high density heat spreading structure dissipating around 450 W in an 11 liter compact enclosure. The paper proposes and demonstrates one of direction of the high power GaN HEMT application to the millimeter-wave 5G long-range base stations.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128391390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
A fully decoupled LC tank VCO based 16 to 19 GHz PLL in 130nm SiGe BiCMOS achieving −131dBc/Hz phase noise at 10MHz offset 基于16至19 GHz锁相环的完全解耦LC槽压控振荡器，采用130nm SiGe BiCMOS，在10MHz偏移时实现- 131dBc/Hz相位噪声
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240451
B. Sadhu, S. Reynolds
{"title":"A fully decoupled LC tank VCO based 16 to 19 GHz PLL in 130nm SiGe BiCMOS achieving −131dBc/Hz phase noise at 10MHz offset","authors":"B. Sadhu, S. Reynolds","doi":"10.1109/CSICS.2017.8240451","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240451","url":null,"abstract":"This paper describes a technique for reducing oscillator phase noise through a circuit topology that decouples the LC tank from the active devices, achieving a higher amplitude of oscillation not limited by the active device breakdown voltage. This fully decoupled LC tank topology also reduces noise injection into the tank, which, coupled with the higher tank swing, results in low phase noise operation. As proof of concept, a VCO operating at 16 to 19 GHz is implemented in the IBM 130nm SiGe BiCMOS technology fT/fmax of 200/280 GHz). The VCO achieves a phase noise of −131dBc/Hz at a 10MHz offset from the carrier.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"2004 11","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132969633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
IC calibration kits and de-embedding techniques for sub-mm-wave device characterization 亚毫米波器件特性的集成电路校准套件和去嵌入技术
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240449
M. Spirito, L. Galatro
{"title":"IC calibration kits and de-embedding techniques for sub-mm-wave device characterization","authors":"M. Spirito, L. Galatro","doi":"10.1109/CSICS.2017.8240449","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240449","url":null,"abstract":"In this paper, we describe a design and characterization flow to accurately extract the performance of high-speed devices, integrated in Silicon-based technologies. An EM-based technique to accurately derive the characteristic impedance of transmission lines embedded in lossy and multilayered substrates, is described. Further, this technique is employed to characterize lower metal levels transmission lines (i.e., M1) enabling to employ a direct calibration/de-embedding approach to properly define the measurement reference plane at the intrinsic device terminals, though a TRL based technique. Finally, the proposed calibration/de-embedding approach is employed to benchmark the performance of a SiGe HBT versus the HiCUM L2 predictions.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126471442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
39GHz GaN front end MMIC for 5G applications 用于5G应用的39GHz GaN前端MMIC
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240473
Bumjin Kim, Vivian Zhi-Qi Li
{"title":"39GHz GaN front end MMIC for 5G applications","authors":"Bumjin Kim, Vivian Zhi-Qi Li","doi":"10.1109/CSICS.2017.8240473","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240473","url":null,"abstract":"This paper presents the design and the measured results of a GaN-based T/R MMIC suitable for millimeter-wave 5G applications. The design successfully integrated a PA, an LNA, and a T/R switch in one IC. At 39GHz, the transmit path achieved an average output power of 26dBm with 9% PAE and −30dBc ACPR under a 64QAM OFDM signal. The receive path achieved 16dB gain with 4dB NF. The fabricated MMIC is packaged in a low cost surface mount package in both single and dual channel versions to support multi-element phased array applications.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121092753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
GaN device-circuit interaction on RF linear power amplifier designed using the MVSG compact model 采用MVSG紧凑模型设计射频线性功率放大器的GaN器件-电路相互作用
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240430
Pilsoon Choi, U. Radhakrishna, D. Antoniadis, E. Fitzgerald
{"title":"GaN device-circuit interaction on RF linear power amplifier designed using the MVSG compact model","authors":"Pilsoon Choi, U. Radhakrishna, D. Antoniadis, E. Fitzgerald","doi":"10.1109/CSICS.2017.8240430","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240430","url":null,"abstract":"This work presents a GaN RF power amplifier with a common-source-common-gate (CS-CG) linearization technique, demonstrating device-circuit interactions using the physics-based MIT Virtual Source GaNFET (MVSG) model. A few device parameters are carefully chosen to investigate their effects on the circuit performance, as well as to suggest how to fabricate or choose a better GaN device for RF power amplifier design. The designed amplifier achieves 11dB gain at 6GHz, 51% drain efficiency at 35.3dBm Psat, and 39dBm output IP3 with 10V supply voltage. In this work, it is shown that the physical device parameters related to DC, RF, and thermal conditions affect the above circuit performance, especially linearity, and could be used to link the circuit performance to specific device level physics.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116683543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
ADC-based receiver designs: Challenges and opportunities 基于adc的接收机设计:挑战与机遇
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240461
A. Sheikholeslami
{"title":"ADC-based receiver designs: Challenges and opportunities","authors":"A. Sheikholeslami","doi":"10.1109/CSICS.2017.8240461","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240461","url":null,"abstract":"This paper reviews a set of architecture and circuit techniques that have enabled data rates beyond 10Gb/s, and explores a range of design challenges and considerations as we move to higher data rates. In particular, we review ADC-based designs and their challenges and tradeoffs, including ADC resolution, oversampling ratio, and power consumption.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121762255","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
MMICs for next generation radar 用于下一代雷达的mmic
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240442
A. Darwish, Ken Mcknight, J. Penn, E. Viveiros, A. Hedden, H. A. Hung
{"title":"MMICs for next generation radar","authors":"A. Darwish, Ken Mcknight, J. Penn, E. Viveiros, A. Hedden, H. A. Hung","doi":"10.1109/CSICS.2017.8240442","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240442","url":null,"abstract":"The rapid progress towards 5G wireless systems is accelerating the development of mm-wave semiconductor processes, broadband circuits, and system technologies. Similarly, next-generation radar is being expanded and redefined. Legacy radar systems are nearing the end of their life cycle and systems developers are aiming to upgrade their capability while reducing cost, size, and weight. Radar systems have requirements that result in technical circuit design challenges including high power, broadband, and low distortion. This paper focuses on MMIC design challenges specific to the design of next-generation radars that will operate in a crowded wireless environment, allow spectrum sharing, and dynamic frequency selection. Simulated and measured data are presented.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"164 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123177151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fully differential high input power handling ultra-wideband low noise amplifier for MIMO radar application 用于MIMO雷达应用的全差分高输入功率处理超宽带低噪声放大器
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240428
M. Sakalas, P. Sakalas, N. Joram, F. Ellinger
{"title":"Fully differential high input power handling ultra-wideband low noise amplifier for MIMO radar application","authors":"M. Sakalas, P. Sakalas, N. Joram, F. Ellinger","doi":"10.1109/CSICS.2017.8240428","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240428","url":null,"abstract":"A fully differential, high input power handling, ultra-wideband, variable gain low noise amplifier MMIC for a monostatic MIMO radar was designed in a 130 nm SiGe BiCMOS Technology. The amplifier features an extensively high RF input power survivability, high power handling, ultra-wideband operation of 0.1–50 GHz and a linearly variable gain with 12 dB tuning range. The measured differential mode noise figure is below 5.5 dB within the bandwidth, whereas the 1-dB compression point is reached at −7.8 to −2.6 dBm input power levels at nominal gain operation. The maximum DC power consumption is 70 mW and the total chip area is 0.76 mm2.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125041204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
DC-62 GHz 4-phase 25% duty cycle quadrature clock generator DC-62 GHz 4相25%占空比正交时钟发生器
2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2017-10-01 DOI: 10.1109/CSICS.2017.8240468
Naftali Weiss, S. Shopov, P. Schvan, P. Chevalier, A. Cathelin, S. Voinigescu
{"title":"DC-62 GHz 4-phase 25% duty cycle quadrature clock generator","authors":"Naftali Weiss, S. Shopov, P. Schvan, P. Chevalier, A. Cathelin, S. Voinigescu","doi":"10.1109/CSICS.2017.8240468","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240468","url":null,"abstract":"A process-, temperature-and supply-insensitive DC-to-62GHz 4-phase quadrature generator for clock signals with 25% duty cycle was manufactured in a production 55-nm SiGe BiCMOS technology. The purely digital circuit is based on a 2.5 V bipolar-CML static divider, AND gates and inverter stages, and operates with input signals from DC to 124 GHz while consuming 178 mW. Measurements were conducted with 63-GHz and 100-GHz bandwidth real-time oscilloscopes. The measured self-oscillation frequency of the static divider in the generator was 98.8 GHz, compared to 93 GHz in simulation. The measured output signals remained in quadrature up to 62 GHz. The measured duty cycle is 25–26% up to 30 GHz and increases up to 33% at 50 GHz, beyond which measurements are impacted by the limited bandwidth of the oscilloscope. The simulated duty cycle was lower than 28% up to 62 GHz.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"185 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129948747","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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