亚毫米波器件特性的集成电路校准套件和去嵌入技术

M. Spirito, L. Galatro
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引用次数: 0

摘要

在本文中,我们描述了一个设计和表征流程,以准确地提取高速器件的性能,集成在硅基技术中。描述了一种基于电磁的技术,可以精确地推导出嵌入有损耗和多层衬底中的传输线的特性阻抗。此外,该技术还用于表征较低金属水平的传输线(即M1),从而能够采用直接校准/去嵌入方法,通过基于TRL的技术来正确定义固有设备终端的测量参考平面。最后,采用所提出的校准/去嵌入方法对SiGe HBT与HiCUM L2预测的性能进行基准测试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
IC calibration kits and de-embedding techniques for sub-mm-wave device characterization
In this paper, we describe a design and characterization flow to accurately extract the performance of high-speed devices, integrated in Silicon-based technologies. An EM-based technique to accurately derive the characteristic impedance of transmission lines embedded in lossy and multilayered substrates, is described. Further, this technique is employed to characterize lower metal levels transmission lines (i.e., M1) enabling to employ a direct calibration/de-embedding approach to properly define the measurement reference plane at the intrinsic device terminals, though a TRL based technique. Finally, the proposed calibration/de-embedding approach is employed to benchmark the performance of a SiGe HBT versus the HiCUM L2 predictions.
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